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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2017-01-08 17:31:45 -0600
committerMichael Ellerman <mpe@ellerman.id.au>2017-02-06 19:46:04 +1100
commitbd067f83b0840e798328d14133ce4542d3bf9e71 (patch)
tree70dab2041cd93996f8deab65b6027498fdf63385 /arch/powerpc/kernel/align.c
parentf9e473f1aa7597affff87bc6a599cf0aa389f0c1 (diff)
powerpc/64: Fix naming of cache block vs. cache line
In a number of places we called "cache line size" what is actually the cache block size, which in the powerpc architecture, means the effective size to use with cache management instructions (it can be different from the actual cache line size). We fix the naming across the board and properly retrieve both pieces of information when available in the device-tree. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/kernel/align.c')
-rw-r--r--arch/powerpc/kernel/align.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index 8d58c61908f7..30ff6590a2dd 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -204,7 +204,7 @@ static int emulate_dcbz(struct pt_regs *regs, unsigned char __user *addr)
int i, size;
#ifdef __powerpc64__
- size = ppc64_caches.dline_size;
+ size = ppc64_caches.dblock_size;
#else
size = L1_CACHE_BYTES;
#endif