diff options
| author | Michael Ellerman <mpe@ellerman.id.au> | 2024-02-29 23:25:17 +1100 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2024-03-03 23:05:21 +1100 |
| commit | 8488cdcb00fd5f238754005a43a3a7445860d344 (patch) | |
| tree | 162e49f3dae81701e48520d340fc4f00e2f2a588 /arch/powerpc/lib/copypage_power7.S | |
| parent | d9cf600ecb7b053345aa76c1988cf374260cfdaf (diff) | |
powerpc/64s: Move dcbt/dcbtst sequence into a macro
There's an almost identical code sequence to specify load/store access
hints in __copy_tofrom_user_power7(), copypage_power7() and
memcpy_power7().
Move the sequence into a common macro, which is passed the registers to
use as they differ slightly.
There also needs to be a copy in the selftests, it could be shared in
future if the headers are cleaned up / refactored.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20240229122521.762431-1-mpe@ellerman.id.au
Diffstat (limited to 'arch/powerpc/lib/copypage_power7.S')
| -rw-r--r-- | arch/powerpc/lib/copypage_power7.S | 12 |
1 files changed, 1 insertions, 11 deletions
diff --git a/arch/powerpc/lib/copypage_power7.S b/arch/powerpc/lib/copypage_power7.S index a783973f1215..07e7cec4d135 100644 --- a/arch/powerpc/lib/copypage_power7.S +++ b/arch/powerpc/lib/copypage_power7.S @@ -27,17 +27,7 @@ _GLOBAL(copypage_power7) #endif ori r10,r7,1 /* stream=1 */ - lis r8,0x8000 /* GO=1 */ - clrldi r8,r8,32 - - /* setup read stream 0 */ - dcbt 0,r4,0b01000 /* addr from */ - dcbt 0,r7,0b01010 /* length and depth from */ - /* setup write stream 1 */ - dcbtst 0,r9,0b01000 /* addr to */ - dcbtst 0,r10,0b01010 /* length and depth to */ - eieio - dcbt 0,r8,0b01010 /* all streams GO */ + DCBT_SETUP_STREAMS(r4, r7, r9, r10, r8) #ifdef CONFIG_ALTIVEC mflr r0 |