diff options
author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-09-14 06:57:52 +0200 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-09-14 06:57:52 +0200 |
commit | 1622d35453132a1acd6d650175f9f45e4bcf553e (patch) | |
tree | 063a2dfa220452590d068418c2b16b90690dae5a /arch/powerpc/perf/imc-pmu.c | |
parent | 978620cc4f5577c5139da9d8377849aeac46687a (diff) | |
parent | 856deb866d16e29bd65952e0289066f6078af773 (diff) |
Merge 5.9-rc5 into staging-next
We want the staging/iio changes in here as well.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/powerpc/perf/imc-pmu.c')
-rw-r--r-- | arch/powerpc/perf/imc-pmu.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/perf/imc-pmu.c b/arch/powerpc/perf/imc-pmu.c index a45d694a5d5d..62d0b54086f8 100644 --- a/arch/powerpc/perf/imc-pmu.c +++ b/arch/powerpc/perf/imc-pmu.c @@ -1289,7 +1289,7 @@ static int trace_imc_prepare_sample(struct trace_imc_data *mem, header->misc = 0; if (cpu_has_feature(CPU_FTR_ARCH_31)) { - switch (IMC_TRACE_RECORD_VAL_HVPR(mem->val)) { + switch (IMC_TRACE_RECORD_VAL_HVPR(be64_to_cpu(READ_ONCE(mem->val)))) { case 0:/* when MSR HV and PR not set in the trace-record */ header->misc |= PERF_RECORD_MISC_GUEST_KERNEL; break; @@ -1297,7 +1297,7 @@ static int trace_imc_prepare_sample(struct trace_imc_data *mem, header->misc |= PERF_RECORD_MISC_GUEST_USER; break; case 2: /* MSR HV is 1 and PR is 0 */ - header->misc |= PERF_RECORD_MISC_HYPERVISOR; + header->misc |= PERF_RECORD_MISC_KERNEL; break; case 3: /* MSR HV is 1 and PR is 1 */ header->misc |= PERF_RECORD_MISC_USER; |