diff options
| author | chenhui zhao <chenhui.zhao@freescale.com> | 2015-07-23 11:55:45 +0800 |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2015-10-16 18:44:27 -0500 |
| commit | 881ea7d3f55bf7b8834c81d86c4dcb3d5f786f15 (patch) | |
| tree | 766e25b5d608cd00ea4636088b010931408661bf /arch/powerpc/platforms/85xx | |
| parent | 20d09927e669b7e92795c804a3cf82d6c4f3c909 (diff) | |
powerpc/corenet: use the mixed mode of MPIC when enabling CPU hotplug
Core reset may cause issue if using the proxy mode of MPIC.
Use the mixed mode of MPIC if enabling CPU hotplug.
Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/platforms/85xx')
| -rw-r--r-- | arch/powerpc/platforms/85xx/corenet_generic.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c b/arch/powerpc/platforms/85xx/corenet_generic.c index b39557120cbb..99412b32586d 100644 --- a/arch/powerpc/platforms/85xx/corenet_generic.c +++ b/arch/powerpc/platforms/85xx/corenet_generic.c @@ -214,7 +214,15 @@ define_machine(corenet_generic) { .pcibios_fixup_bus = fsl_pcibios_fixup_bus, .pcibios_fixup_phb = fsl_pcibios_fixup_phb, #endif +/* + * Core reset may cause issue if using the proxy mode of MPIC. + * So, use the mixed mode of MPIC if enabling CPU hotplug. + */ +#ifdef CONFIG_HOTPLUG_CPU + .get_irq = mpic_get_irq, +#else .get_irq = mpic_get_coreint_irq, +#endif .restart = fsl_rstcr_restart, .calibrate_decr = generic_calibrate_decr, .progress = udbg_progress, |