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| author | Arnd Bergmann <arnd@arndb.de> | 2024-03-04 08:31:44 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2024-03-04 08:31:44 +0100 |
| commit | f9c59f24821ce1681db661c7f19d5f280525e3ed (patch) | |
| tree | b8332299432a3248fad5a84d0f111fa5226497df /arch/riscv/boot | |
| parent | 3a591d5f44b6a46ba272e87c9b41bb878cb016da (diff) | |
| parent | 0f46e1339ef113f0dedf7ad376452cc722dbcfe6 (diff) | |
Merge tag 'riscv-sophgo-dt-for-v6.9' of https://github.com/sophgo/linux into soc/dt
RISC-V Devicetrees for v6.9
Sophgo:
Added reset support for SG2042.
Also updated maintainer information for SOPHGO vendor support.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
* tag 'riscv-sophgo-dt-for-v6.9' of https://github.com/sophgo/linux:
MAINTAINERS: Setup proper info for SOPHGO vendor support
riscv: dts: add resets property for uart node
riscv: dts: add reset generator for Sophgo SG2042 SoC
Link: https://lore.kernel.org/r/MA0P287MB2822315119DA51FF95EE3071FE5D2@MA0P287MB2822.INDP287.PROD.OUTLOOK.COM
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/riscv/boot')
| -rw-r--r-- | arch/riscv/boot/dts/sophgo/sg2042.dtsi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi index ead1cc35d88b..81fda312f988 100644 --- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi +++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi @@ -6,6 +6,8 @@ /dts-v1/; #include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/reset/sophgo,sg2042-reset.h> + #include "sg2042-cpus.dtsi" / { @@ -327,6 +329,12 @@ riscv,ndev = <224>; }; + rstgen: reset-controller@7030013000 { + compatible = "sophgo,sg2042-reset"; + reg = <0x00000070 0x30013000 0x00000000 0x0000000c>; + #reset-cells = <1>; + }; + uart0: serial@7040000000 { compatible = "snps,dw-apb-uart"; reg = <0x00000070 0x40000000 0x00000000 0x00001000>; @@ -335,6 +343,7 @@ clock-frequency = <500000000>; reg-shift = <2>; reg-io-width = <4>; + resets = <&rstgen RST_UART0>; status = "disabled"; }; }; |