Merge branch irq/riscv-ipi into irq/irqchip-next

* irq/riscv-ipi:
  : .
  : RISC-V IPI rework from Anup Patel:
  :
  : "This series aims to improve IPI support in Linux RISC-V in following ways:
  :  1) Treat IPIs as normal per-CPU interrupts instead of having custom RISC-V
  :     specific hooks. This also makes Linux RISC-V IPI support aligned with
  :     other architectures.
  :  2) Remote TLB flushes and icache flushes should prefer local IPIs instead
  :     of SBI calls whenever we have specialized hardware (such as RISC-V AIA
  :     IMSIC and RISC-V SWI) which allows S-mode software to directly inject
  :     IPIs without any assistance from M-mode runtime firmware."
  : .
  irqchip/riscv-intc: Add empty irq_eoi() for chained irq handlers
  RISC-V: Use IPIs for remote icache flush when possible
  RISC-V: Use IPIs for remote TLB flush when possible
  RISC-V: Allow marking IPIs as suitable for remote FENCEs
  RISC-V: Treat IPIs as normal Linux IRQs
  irqchip/riscv-intc: Allow drivers to directly discover INTC hwnode
  RISC-V: Clear SIP bit only when using SBI IPI operations

Signed-off-by: Marc Zyngier <maz@kernel.org>

1 files changed, 2 insertions, 3 deletions

diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
index ddb2afba6d25..00b53913d4c6 100644
--- a/arch/riscv/kernel/smpboot.c
+++ b/arch/riscv/kernel/smpboot.c
@@ -30,7 +30,6 @@
 #include <asm/numa.h>
 #include <asm/tlbflush.h>
 #include <asm/sections.h>
-#include <asm/sbi.h>
 #include <asm/smp.h>
 
 #include "head.h"
@@ -158,12 +157,12 @@ asmlinkage __visible void smp_callin(void)
 	struct mm_struct *mm = &init_mm;
 	unsigned int curr_cpuid = smp_processor_id();
 
-	riscv_clear_ipi();
-
 	/* All kernel threads share the same mm context.  */
 	mmgrab(mm);
 	current->active_mm = mm;
 
+	riscv_ipi_enable();
+
 	store_cpu_topology(curr_cpuid);
 	notify_cpu_starting(curr_cpuid);
 	numa_add_cpu(curr_cpuid);