diff options
| author | Anup Patel <apatel@ventanamicro.com> | 2023-11-27 16:11:09 +0530 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2024-01-19 09:19:50 +0530 |
| commit | 367188297254e7f81e3c3c94e6d6a623f757c4cb (patch) | |
| tree | c6b165cfa950d0675797b0fa46e567cc9a8fa7bc /arch/riscv/kvm/vcpu_onereg.c | |
| parent | 9d1694dc91ce7b80bc96d6d8eaf1a1eca668d847 (diff) | |
RISC-V: KVM: Allow Zbc extension for Guest/VM
We extend the KVM ISA extension ONE_REG interface to allow KVM
user space to detect and enable Zbc extension for Guest/VM.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'arch/riscv/kvm/vcpu_onereg.c')
| -rw-r--r-- | arch/riscv/kvm/vcpu_onereg.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index fc34557f5356..4522fdfec94e 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -42,6 +42,7 @@ static const unsigned long kvm_isa_ext_arr[] = { KVM_ISA_EXT_ARR(SVPBMT), KVM_ISA_EXT_ARR(ZBA), KVM_ISA_EXT_ARR(ZBB), + KVM_ISA_EXT_ARR(ZBC), KVM_ISA_EXT_ARR(ZBS), KVM_ISA_EXT_ARR(ZICBOM), KVM_ISA_EXT_ARR(ZICBOZ), @@ -92,6 +93,7 @@ static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext) case KVM_RISCV_ISA_EXT_SVNAPOT: case KVM_RISCV_ISA_EXT_ZBA: case KVM_RISCV_ISA_EXT_ZBB: + case KVM_RISCV_ISA_EXT_ZBC: case KVM_RISCV_ISA_EXT_ZBS: case KVM_RISCV_ISA_EXT_ZICNTR: case KVM_RISCV_ISA_EXT_ZICOND: |