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authorHeiko Carstens <heiko.carstens@de.ibm.com>2016-12-14 13:45:07 +0100
committerMartin Schwidefsky <schwidefsky@de.ibm.com>2017-01-16 07:27:51 +0100
commite3850ecfc17ea8e23c02368a24fc23be129fb3b0 (patch)
tree4078afd577d686ae0b3b1090c1e2b4615518d936 /arch/s390/include/asm/cpu_mf.h
parent1d9995771fcbdd70d975b8dac4a201e76c9a2537 (diff)
s390/cpumf: get rid of variable length array
The stcctm5 inline assembly uses a variable length array to specify the memory that is written to. According to the gcc manual this trick only works if the length is known at compile time. This is not the the case for the stccm5 inline assembly. Therefore simply use a full memory clobber. As requested by Martin also move the output Q constraint operand to the input operands list, since all we want is that the compiler generates an instruction that may use the displacement field: in other words we only need the address of *val. That the inline assembly actually writes to an array starting at val is taken care of with the memory clobber. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390/include/asm/cpu_mf.h')
-rw-r--r--arch/s390/include/asm/cpu_mf.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/s390/include/asm/cpu_mf.h b/arch/s390/include/asm/cpu_mf.h
index 428c41239a49..d1e0707310fd 100644
--- a/arch/s390/include/asm/cpu_mf.h
+++ b/arch/s390/include/asm/cpu_mf.h
@@ -199,14 +199,15 @@ static inline int ecctr(u64 ctr, u64 *val)
/* Store CPU counter multiple for the MT utilization counter set */
static inline int stcctm5(u64 num, u64 *val)
{
- typedef struct { u64 _[num]; } addrtype;
int cc;
asm volatile (
" .insn rsy,0xeb0000000017,%2,5,%1\n"
" ipm %0\n"
" srl %0,28\n"
- : "=d" (cc), "=Q" (*(addrtype *) val) : "d" (num) : "cc");
+ : "=d" (cc)
+ : "Q" (*val), "d" (num)
+ : "cc", "memory");
return cc;
}