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authorSimon Horman <horms@verge.net.au>2011-03-24 07:04:38 +0000
committerPaul Mundt <lethal@linux-sh.org>2011-03-25 01:24:57 +0900
commit9d9659b6c0ebf7dde65ebada4c67980818245913 (patch)
tree05335a7e2d03350309d617834997d7fe9c395d28 /arch/sh/boot
parenta6558c2d07d5c955fbb0290f68c27164a5567b9a (diff)
mmc: Add MMC_PROGRESS_*
This is my second attempt to make this enum generally available. The first attempt added MMCIF_PROGRESS_* to include/linux/mmc/sh_mmcif.h. However this is not sufficiently generic as the enum will be used by SDHI boot code. Signed-off-by: Simon Horman <horms@verge.net.au> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/boot')
-rw-r--r--arch/sh/boot/romimage/mmcif-sh7724.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/sh/boot/romimage/mmcif-sh7724.c b/arch/sh/boot/romimage/mmcif-sh7724.c
index c84e7831018d..16b122510c84 100644
--- a/arch/sh/boot/romimage/mmcif-sh7724.c
+++ b/arch/sh/boot/romimage/mmcif-sh7724.c
@@ -9,6 +9,7 @@
*/
#include <linux/mmc/sh_mmcif.h>
+#include <linux/mmc/boot.h>
#include <mach/romimage.h>
#define MMCIF_BASE (void __iomem *)0xa4ca0000
@@ -29,7 +30,7 @@
*/
asmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes)
{
- mmcif_update_progress(MMCIF_PROGRESS_ENTER);
+ mmcif_update_progress(MMC_PROGRESS_ENTER);
/* enable clock to the MMCIF hardware block */
__raw_writel(__raw_readl(MSTPCR2) & ~0x20000000, MSTPCR2);
@@ -52,12 +53,12 @@ asmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes)
/* high drive capability for MMC pins */
__raw_writew(__raw_readw(DRVCRA) | 0x3000, DRVCRA);
- mmcif_update_progress(MMCIF_PROGRESS_INIT);
+ mmcif_update_progress(MMC_PROGRESS_INIT);
/* setup MMCIF hardware */
sh_mmcif_boot_init(MMCIF_BASE);
- mmcif_update_progress(MMCIF_PROGRESS_LOAD);
+ mmcif_update_progress(MMC_PROGRESS_LOAD);
/* load kernel via MMCIF interface */
sh_mmcif_boot_do_read(MMCIF_BASE, 512,
@@ -67,5 +68,5 @@ asmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes)
/* disable clock to the MMCIF hardware block */
__raw_writel(__raw_readl(MSTPCR2) | 0x20000000, MSTPCR2);
- mmcif_update_progress(MMCIF_PROGRESS_DONE);
+ mmcif_update_progress(MMC_PROGRESS_DONE);
}