diff options
| author | Bjorn Helgaas <bhelgaas@google.com> | 2024-01-02 18:40:11 -0600 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2024-01-03 11:46:22 +0100 |
| commit | 54aa699e8094efb7d7675fefbc03dfce24f98456 (patch) | |
| tree | 67a78316e4834ef635b4952cc629b1534076b9cf /arch/x86/events/intel/core.c | |
| parent | 7d28365a06af74cee015a448d32ab6e98cd05cfb (diff) | |
arch/x86: Fix typos
Fix typos, most reported by "codespell arch/x86". Only touches comments,
no code changes.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Randy Dunlap <rdunlap@infradead.org>
Link: https://lore.kernel.org/r/20240103004011.1758650-1-helgaas@kernel.org
Diffstat (limited to 'arch/x86/events/intel/core.c')
| -rw-r--r-- | arch/x86/events/intel/core.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index a08f794a0e79..fdfcd5112884 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -4027,7 +4027,7 @@ static int intel_pmu_hw_config(struct perf_event *event) /* * Currently, the only caller of this function is the atomic_switch_perf_msrs(). - * The host perf conext helps to prepare the values of the real hardware for + * The host perf context helps to prepare the values of the real hardware for * a set of msrs that need to be switched atomically in a vmx transaction. * * For example, the pseudocode needed to add a new msr should look like: |