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authorDave Hansen <dave.hansen@linux.intel.com>2016-06-02 17:19:35 -0700
committerIngo Molnar <mingo@kernel.org>2016-06-08 12:05:59 +0200
commit5134596caee9e834d2486edc45efad4c9e6effc3 (patch)
tree9e3411cac8c8bde287719f03db3d8d6db48af632 /arch/x86/events/msr.c
parent353bf605a771e3c86b21de017e9525aba7d64770 (diff)
perf/x86/msr: Add missing Intel models
This patch presumes that Kabylake and Skylake Server will be the same as the existing Skylake parts and adds them to the MSR events code. Also add handling for "WESTMERE2". Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Dave Hansen <dave@sr71.net> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Cc: jacob.jun.pan@intel.com Link: http://lkml.kernel.org/r/20160603001935.FE6B3847@viggo.jf.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/events/msr.c')
-rw-r--r--arch/x86/events/msr.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c
index 83cf13e368cd..50b3a056f96b 100644
--- a/arch/x86/events/msr.c
+++ b/arch/x86/events/msr.c
@@ -40,6 +40,7 @@ static bool test_intel(int idx)
case INTEL_FAM6_NEHALEM_EX:
case INTEL_FAM6_WESTMERE:
+ case INTEL_FAM6_WESTMERE2:
case INTEL_FAM6_WESTMERE_EP:
case INTEL_FAM6_WESTMERE_EX:
@@ -68,6 +69,9 @@ static bool test_intel(int idx)
case INTEL_FAM6_SKYLAKE_MOBILE:
case INTEL_FAM6_SKYLAKE_DESKTOP:
+ case INTEL_FAM6_SKYLAKE_X:
+ case INTEL_FAM6_KABYLAKE_MOBILE:
+ case INTEL_FAM6_KABYLAKE_DESKTOP:
if (idx == PERF_MSR_SMI || idx == PERF_MSR_PPERF)
return true;
break;