diff options
| author | Thomas Gleixner <tglx@linutronix.de> | 2020-04-03 22:37:31 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2020-06-11 15:14:56 +0200 |
| commit | 94a46d316f2b54e3de8a4fa884cb16383db7fcd8 (patch) | |
| tree | 6cafbbfb177b93090f9a41515227d5f7402b47a3 /arch/x86/kernel/cpu/mce/p5.c | |
| parent | 2c058b03cc06ba485169778a271f87e5ac57dd83 (diff) | |
x86/mce: Move nmi_enter/exit() into the entry point
There is no reason to have nmi_enter/exit() in the actual MCE
handlers. Move it to the entry point. This also covers the until now
uncovered initial handler which only prints.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Acked-by: Andy Lutomirski <luto@kernel.org>
Link: https://lkml.kernel.org/r/20200505135314.243936614@linutronix.de
Diffstat (limited to 'arch/x86/kernel/cpu/mce/p5.c')
| -rw-r--r-- | arch/x86/kernel/cpu/mce/p5.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/x86/kernel/cpu/mce/p5.c b/arch/x86/kernel/cpu/mce/p5.c index 5ee94aa1b766..dc29f0f7b3ed 100644 --- a/arch/x86/kernel/cpu/mce/p5.c +++ b/arch/x86/kernel/cpu/mce/p5.c @@ -25,8 +25,6 @@ static void pentium_machine_check(struct pt_regs *regs, long error_code) { u32 loaddr, hi, lotype; - nmi_enter(); - rdmsr(MSR_IA32_P5_MC_ADDR, loaddr, hi); rdmsr(MSR_IA32_P5_MC_TYPE, lotype, hi); @@ -39,8 +37,6 @@ static void pentium_machine_check(struct pt_regs *regs, long error_code) } add_taint(TAINT_MACHINE_CHECK, LOCKDEP_NOW_UNRELIABLE); - - nmi_exit(); } /* Set up machine check reporting for processors with Intel style MCE: */ |