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authorJeremy Compostella <jeremy.compostella@intel.com>2016-05-11 17:23:34 +0200
committerThomas Gleixner <tglx@linutronix.de>2016-05-12 14:27:14 +0200
commite2724e9d969294879936daf7833d4adda26c8efc (patch)
tree8fe694e2996430f124a4ffe25c206a4136e9e733 /arch/x86/kernel/tsc_msr.c
parent9a7a076e8e4ffcfec05e3cafe4c4e31d41ddbaa0 (diff)
x86/tsc: Add missing Cherrytrail frequency to the table
Intel Cherrytrail is based on Airmont core so MSR_FSB_FREQ[2:0] = 4 means that the CPU reference clock runs at 80MHz. Add this missing frequency to the table. Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com> Link: http://lkml.kernel.org/r/87y47gty89.fsf@intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/kernel/tsc_msr.c')
-rw-r--r--arch/x86/kernel/tsc_msr.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/x86/kernel/tsc_msr.c b/arch/x86/kernel/tsc_msr.c
index 6aa0f4d9eea6..9911a0620f9a 100644
--- a/arch/x86/kernel/tsc_msr.c
+++ b/arch/x86/kernel/tsc_msr.c
@@ -23,6 +23,7 @@
#include <asm/param.h>
/* CPU reference clock frequency: in KHz */
+#define FREQ_80 80000
#define FREQ_83 83200
#define FREQ_100 99840
#define FREQ_133 133200
@@ -56,6 +57,8 @@ static struct freq_desc freq_desc_tables[] = {
{ 6, 0x37, 1, { FREQ_83, FREQ_100, FREQ_133, FREQ_166, 0, 0, 0, 0 } },
/* ANN */
{ 6, 0x5a, 1, { FREQ_83, FREQ_100, FREQ_133, FREQ_100, 0, 0, 0, 0 } },
+ /* AIRMONT */
+ { 6, 0x4c, 1, { FREQ_83, FREQ_100, FREQ_133, FREQ_166, FREQ_80, 0, 0, 0 } },
};
static int match_cpu(u8 family, u8 model)