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authorDmitry Torokhov <dmitry.torokhov@gmail.com>2022-09-30 09:00:41 -0700
committerPatrice Chotard <patrice.chotard@foss.st.com>2023-02-03 14:41:50 +0100
commit4722dd4029c63f10414ffd8d3ffdd6c748391cd7 (patch)
tree577afb43ca492999e3ebd221cdb8be59bf77ed8a /arch
parent6d796c50f84ca79f1722bb131799e5a5710c4700 (diff)
ARM: dts: stihxxx-b2120: fix polarity of reset line of tsin0 port
According to c8sectpfe driver code we first drive reset line low and then high to reset the port, therefore the reset line is supposed to be annotated as "active low". This will be important when we convert the driver to gpiod API. Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/stihxxx-b2120.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/stihxxx-b2120.dtsi b/arch/arm/boot/dts/stihxxx-b2120.dtsi
index 920a0bad7494..8d9a2dfa76f1 100644
--- a/arch/arm/boot/dts/stihxxx-b2120.dtsi
+++ b/arch/arm/boot/dts/stihxxx-b2120.dtsi
@@ -178,7 +178,7 @@
tsin-num = <0>;
serial-not-parallel;
i2c-bus = <&ssc2>;
- reset-gpios = <&pio15 4 GPIO_ACTIVE_HIGH>;
+ reset-gpios = <&pio15 4 GPIO_ACTIVE_LOW>;
dvb-card = <STV0367_TDA18212_NIMA_1>;
};
};