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authorZyta Szpak <zr@semihalf.com>2021-01-21 16:52:37 +0100
committerShawn Guo <shawnguo@kernel.org>2021-01-30 21:28:23 +0800
commitaa880c6f3ee6dbd0d5ab02026a514ff8ea0a3328 (patch)
tree5ff2b658d1f1449bd8a5aaf2ac0f04fcd25ec389 /arch
parent82c082784e03a9a9c043345f9bc04bc8254cf6da (diff)
arm64: dts: ls1046a: fix dcfg address range
Dcfg was overlapping with clockgen address space which resulted in failure in memory allocation for dcfg. According regs description dcfg size should not be bigger than 4KB. Signed-off-by: Zyta Szpak <zr@semihalf.com> Fixes: 8126d88162a5 ("arm64: dts: add QorIQ LS1046A SoC support") Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 025e1f587662..565934cbfa28 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -385,7 +385,7 @@
dcfg: dcfg@1ee0000 {
compatible = "fsl,ls1046a-dcfg", "syscon";
- reg = <0x0 0x1ee0000 0x0 0x10000>;
+ reg = <0x0 0x1ee0000 0x0 0x1000>;
big-endian;
};