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authorMatt Roper <matthew.d.roper@intel.com>2020-10-09 12:44:40 -0700
committerMatt Roper <matthew.d.roper@intel.com>2020-10-09 18:51:27 -0700
commit55e3c170950f5a15f1bf8b585881eab83b308271 (patch)
tree8193d429eff18f2462dd70b0dcb8715fd995585a /drivers/bus
parent0bcbcba78269f425a8d258be59d918ee2a36724b (diff)
drm/i915: Rename FORCEWAKE_BLITTER to FORCEWAKE_GT
The power well that we've been referring to as the 'blitter' well is actually more of a general GT power well which contains a lot of things other than the blitter engine registers. The FORCEWAKE_BLITTER name in the code was used for historic reasons, but no longer matches how the bspec describes this power well and just causes confusion for people not familiar with this area of the code. Let's rename it to FORCEWAKE_GT to more accurately describe the role of the power well and match how the modern bspec refers to it. v2: - Add a comment noting that the GT power well includes the blitter engine. (Jose) Bspec: 66696, 66534, 67609 Cc: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201009194442.3668677-2-matthew.d.roper@intel.com Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
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