diff options
| author | Kevin Groeneveld <kgroeneveld@lenbrook.com> | 2022-12-10 15:38:35 -0500 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2023-02-21 09:34:36 -0800 |
| commit | 02d7bd1efb4280ea1a75ad1eece3f19537f82a19 (patch) | |
| tree | ad67867541b176b27a3b9907f7bca8e73997cbc7 /drivers/clk/imx/clk-pll14xx.c | |
| parent | e45dbb81b3953089e048ab4aa2c89aedfb126053 (diff) | |
clk: imx: pll14xx: fix recalc_rate for negative kdiv
kdiv is a signed 16 bit value in the DEV_CTL1 register. Commit
53990cf9d5b4 ("clk: imx: pll14xx: consolidate rate calculation") changed
the kdiv variable from a short int to just int. When the value read from
the DIV_CTL1 register is assigned directly to an int the sign of the value
is lost resulting in incorrect results when the value is negative. Adding
a s16 cast to the register value fixes the issue.
Fixes: 53990cf9d5b4 ("clk: imx: pll14xx: consolidate rate calculation")
Signed-off-by: Kevin Groeneveld <kgroeneveld@lenbrook.com>
Link: https://lore.kernel.org/r/20221210203835.9714-1-kgroeneveld@lenbrook.com
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/imx/clk-pll14xx.c')
| -rw-r--r-- | drivers/clk/imx/clk-pll14xx.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c index 828336873a98..7150c59bbfc9 100644 --- a/drivers/clk/imx/clk-pll14xx.c +++ b/drivers/clk/imx/clk-pll14xx.c @@ -256,7 +256,7 @@ static unsigned long clk_pll14xx_recalc_rate(struct clk_hw *hw, if (pll->type == PLL_1443X) { pll_div_ctl1 = readl_relaxed(pll->base + DIV_CTL1); - kdiv = FIELD_GET(KDIV_MASK, pll_div_ctl1); + kdiv = (s16)FIELD_GET(KDIV_MASK, pll_div_ctl1); } else { kdiv = 0; } |