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| author | Biju Das <biju.das.jz@bp.renesas.com> | 2021-09-22 12:24:04 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-09-24 15:11:05 +0200 |
| commit | 664bb2e45b89cd8213e3c9772713323f75e21892 (patch) | |
| tree | fcfa94301a9b6fc8911a167a89afce81ac905e39 /drivers/clk/renesas/rzg2l-cpg.c | |
| parent | 6880fa6c56601bb8ed59df6c30fd390cc5f6dd8f (diff) | |
clk: renesas: r9a07g044: Mark IA55_CLK and DMAC_ACLK critical
Add IA55_CLK and DMAC_ACLK as critical clocks.
Previously it worked ok, because of a bug in clock status function
and the following patch in this series fixes the original bug.
Fixes: c3e67ad6f5a2 ("dt-bindings: clock: r9a07g044-cpg: Update clock/reset definitions")
Fixes: eb829e549ba6 ("clk: renesas: r9a07g044: Add DMAC clocks/resets")
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210922112405.26413-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/renesas/rzg2l-cpg.c')
0 files changed, 0 insertions, 0 deletions