diff options
| author | Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> | 2016-05-24 15:19:16 +0200 |
|---|---|---|
| committer | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2016-06-02 11:18:20 +0200 |
| commit | 53f69967dca340d79c8dda0734b8912241cb4d31 (patch) | |
| tree | 01a8a3dda55fd216377a0ea6cac9e9d40045861a /drivers/clk/samsung/clk-cpu.h | |
| parent | 0c0cd59a4c31aa0dccb49450fca5e36d1759f1ca (diff) | |
clk: samsung: cpu: prepare for adding Exynos5433 CPU clocks
Exynos5433 uses different register layout for CPU clock registers
than earlier SoCs so add new code for handling this layout. Also
add new CLK_CPU_HAS_E5433_REGS_LAYOUT flag to request using it.
There should be no functional change resulting from this patch.
Cc: Kukjin Kim <kgene@kernel.org>
CC: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Diffstat (limited to 'drivers/clk/samsung/clk-cpu.h')
| -rw-r--r-- | drivers/clk/samsung/clk-cpu.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/clk/samsung/clk-cpu.h b/drivers/clk/samsung/clk-cpu.h index 37874d3c3165..d4b6b517fe1b 100644 --- a/drivers/clk/samsung/clk-cpu.h +++ b/drivers/clk/samsung/clk-cpu.h @@ -57,10 +57,12 @@ struct exynos_cpuclk { struct notifier_block clk_nb; unsigned long flags; -/* The CPU clock registers has DIV1 configuration register */ +/* The CPU clock registers have DIV1 configuration register */ #define CLK_CPU_HAS_DIV1 (1 << 0) /* When ALT parent is active, debug clocks need safe divider values */ #define CLK_CPU_NEEDS_DEBUG_ALT_DIV (1 << 1) +/* The CPU clock registers have Exynos5433-compatible layout */ +#define CLK_CPU_HAS_E5433_REGS_LAYOUT (1 << 2) }; extern int __init exynos_register_cpu_clock(struct samsung_clk_provider *ctx, |