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authorChen-Yu Tsai <wens@csie.org>2017-05-31 15:58:21 +0800
committerMaxime Ripard <maxime.ripard@free-electrons.com>2017-05-31 21:57:27 +0200
commitc4be8c68e6900b1811bc64f74cb13d5032a389ce (patch)
tree1cffd42e211b79ba430da8b611387e266da6c387 /drivers/clk/sunxi-ng/Makefile
parenta91afc974ee8441940241e3c39c75d7b8f38e911 (diff)
clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM
The PRCM takes PLL_PERIPH0 as one of its parents for the AR100 clock. As such we need to be able to describe this relationship in the device tree. Export the PLL_PERIPH0 clock so we can reference it in the PRCM node. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'drivers/clk/sunxi-ng/Makefile')
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