diff options
| author | Peng Fan <peng.fan@nxp.com> | 2020-02-19 15:59:47 +0800 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2020-03-10 14:01:52 +0800 |
| commit | 8ffe9c7bb9e47745b8a678629b22f57b23b8dac5 (patch) | |
| tree | 90e41750dcb4770ea86bb2a78b66d0604c711596 /drivers/clk | |
| parent | 28b2f82e0383e27476be8a5e13d2aea07ebeb275 (diff) | |
clk: imx: pfdv2: switch to use determine_rate
Per clk_ops, compared with round_rate, determine_rate could optionally
support the parent clock that should be used to provide the clock rate.
In this patch, the parent clock is just parent->rate as round_rate.
The following patch will calculate the best parent clock.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/imx/clk-pfdv2.c | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/drivers/clk/imx/clk-pfdv2.c b/drivers/clk/imx/clk-pfdv2.c index f8707278aad9..28b5f208ced9 100644 --- a/drivers/clk/imx/clk-pfdv2.c +++ b/drivers/clk/imx/clk-pfdv2.c @@ -98,10 +98,11 @@ static unsigned long clk_pfdv2_recalc_rate(struct clk_hw *hw, return tmp; } -static long clk_pfdv2_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int clk_pfdv2_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { - u64 tmp = *prate; + u64 tmp = req->best_parent_rate; + u64 rate = req->rate; u8 frac; tmp = tmp * 18 + rate / 2; @@ -113,11 +114,13 @@ static long clk_pfdv2_round_rate(struct clk_hw *hw, unsigned long rate, else if (frac > 35) frac = 35; - tmp = *prate; + tmp = req->best_parent_rate; tmp *= 18; do_div(tmp, frac); - return tmp; + req->rate = tmp; + + return 0; } static int clk_pfdv2_is_enabled(struct clk_hw *hw) @@ -167,7 +170,7 @@ static const struct clk_ops clk_pfdv2_ops = { .enable = clk_pfdv2_enable, .disable = clk_pfdv2_disable, .recalc_rate = clk_pfdv2_recalc_rate, - .round_rate = clk_pfdv2_round_rate, + .determine_rate = clk_pfdv2_determine_rate, .set_rate = clk_pfdv2_set_rate, .is_enabled = clk_pfdv2_is_enabled, }; |