diff options
| author | Nick Chan <towinchenmi@gmail.com> | 2024-12-19 02:25:05 +0800 |
|---|---|---|
| committer | Viresh Kumar <viresh.kumar@linaro.org> | 2024-12-23 16:26:46 +0530 |
| commit | 0755a9376ec949eb7d881324548266ba8667a206 (patch) | |
| tree | ed68bbf2e39b7c427cf09bea736ec285500b2641 /drivers/cpufreq | |
| parent | 4a06c250abaaf7cd1e32abcb90694b551712fa63 (diff) | |
cpufreq: apple-soc: Allow per-SoC configuration of APPLE_DVFS_CMD_PS1
Support for SoC that has a different APPLE_DVFS_CMD_PS1 will be added soon,
so modify the driver first to allow it to be configured per-SoC.
Signed-off-by: Nick Chan <towinchenmi@gmail.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Diffstat (limited to 'drivers/cpufreq')
| -rw-r--r-- | drivers/cpufreq/apple-soc-cpufreq.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/cpufreq/apple-soc-cpufreq.c b/drivers/cpufreq/apple-soc-cpufreq.c index ad6c7b8f290c..90e34105b50b 100644 --- a/drivers/cpufreq/apple-soc-cpufreq.c +++ b/drivers/cpufreq/apple-soc-cpufreq.c @@ -27,6 +27,7 @@ #define APPLE_DVFS_CMD_SET BIT(25) #define APPLE_DVFS_CMD_PS2 GENMASK(15, 12) #define APPLE_DVFS_CMD_PS1 GENMASK(4, 0) +#define APPLE_DVFS_CMD_PS1_SHIFT 0 /* Same timebase as CPU counter (24MHz) */ #define APPLE_DVFS_LAST_CHG_TIME 0x38 @@ -59,6 +60,8 @@ struct apple_soc_cpufreq_info { u64 max_pstate; u64 cur_pstate_mask; u64 cur_pstate_shift; + u64 ps1_mask; + u64 ps1_shift; }; struct apple_cpu_priv { @@ -74,6 +77,8 @@ static const struct apple_soc_cpufreq_info soc_t8103_info = { .max_pstate = 15, .cur_pstate_mask = APPLE_DVFS_STATUS_CUR_PS_T8103, .cur_pstate_shift = APPLE_DVFS_STATUS_CUR_PS_SHIFT_T8103, + .ps1_mask = APPLE_DVFS_CMD_PS1, + .ps1_shift = APPLE_DVFS_CMD_PS1_SHIFT, }; static const struct apple_soc_cpufreq_info soc_t8112_info = { @@ -81,12 +86,16 @@ static const struct apple_soc_cpufreq_info soc_t8112_info = { .max_pstate = 31, .cur_pstate_mask = APPLE_DVFS_STATUS_CUR_PS_T8112, .cur_pstate_shift = APPLE_DVFS_STATUS_CUR_PS_SHIFT_T8112, + .ps1_mask = APPLE_DVFS_CMD_PS1, + .ps1_shift = APPLE_DVFS_CMD_PS1_SHIFT, }; static const struct apple_soc_cpufreq_info soc_default_info = { .has_ps2 = false, .max_pstate = 15, .cur_pstate_mask = 0, /* fallback */ + .ps1_mask = APPLE_DVFS_CMD_PS1, + .ps1_shift = APPLE_DVFS_CMD_PS1_SHIFT, }; static const struct of_device_id apple_soc_cpufreq_of_match[] __maybe_unused = { @@ -152,8 +161,8 @@ static int apple_soc_cpufreq_set_target(struct cpufreq_policy *policy, return -EIO; } - reg &= ~APPLE_DVFS_CMD_PS1; - reg |= FIELD_PREP(APPLE_DVFS_CMD_PS1, pstate); + reg &= ~priv->info->ps1_mask; + reg |= pstate << priv->info->ps1_shift; if (priv->info->has_ps2) { reg &= ~APPLE_DVFS_CMD_PS2; reg |= FIELD_PREP(APPLE_DVFS_CMD_PS2, pstate); |