crypto: qat - Move driver to drivers/crypto/intel/qat

With the growing number of Intel crypto drivers, it makes sense to
group them all into a single drivers/crypto/intel/ directory.

Signed-off-by: Tom Zanussi <tom.zanussi@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

4 files changed, 0 insertions, 553 deletions

diff --git a/drivers/crypto/qat/qat_dh895xcc/Makefile b/drivers/crypto/qat/qat_dh895xcc/Makefile
deleted file mode 100644
index 38d6f8e1624a..000000000000
--- a/drivers/crypto/qat/qat_dh895xcc/Makefile
+++ /dev/null
@@ -1,4 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-ccflags-y := -I $(srctree)/$(src)/../qat_common
-obj-$(CONFIG_CRYPTO_DEV_QAT_DH895xCC) += qat_dh895xcc.o
-qat_dh895xcc-objs := adf_drv.o adf_dh895xcc_hw_data.o
diff --git a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
deleted file mode 100644
index 1ebe0b351fae..000000000000
--- a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
+++ /dev/null
@@ -1,252 +0,0 @@
-// SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)
-/* Copyright(c) 2014 - 2021 Intel Corporation */
-#include <adf_accel_devices.h>
-#include <adf_common_drv.h>
-#include <adf_gen2_config.h>
-#include <adf_gen2_dc.h>
-#include <adf_gen2_hw_data.h>
-#include <adf_gen2_pfvf.h>
-#include "adf_dh895xcc_hw_data.h"
-#include "icp_qat_hw.h"
-
-#define ADF_DH895XCC_VF_MSK	0xFFFFFFFF
-
-/* Worker thread to service arbiter mappings */
-static const u32 thrd_to_arb_map[ADF_DH895XCC_MAX_ACCELENGINES] = {
-	0x12222AAA, 0x11666666, 0x12222AAA, 0x11666666,
-	0x12222AAA, 0x11222222, 0x12222AAA, 0x11222222,
-	0x12222AAA, 0x11222222, 0x12222AAA, 0x11222222
-};
-
-static struct adf_hw_device_class dh895xcc_class = {
-	.name = ADF_DH895XCC_DEVICE_NAME,
-	.type = DEV_DH895XCC,
-	.instances = 0
-};
-
-static u32 get_accel_mask(struct adf_hw_device_data *self)
-{
-	u32 fuses = self->fuses;
-
-	return ~fuses >> ADF_DH895XCC_ACCELERATORS_REG_OFFSET &
-			 ADF_DH895XCC_ACCELERATORS_MASK;
-}
-
-static u32 get_ae_mask(struct adf_hw_device_data *self)
-{
-	u32 fuses = self->fuses;
-
-	return ~fuses & ADF_DH895XCC_ACCELENGINES_MASK;
-}
-
-static u32 get_misc_bar_id(struct adf_hw_device_data *self)
-{
-	return ADF_DH895XCC_PMISC_BAR;
-}
-
-static u32 get_etr_bar_id(struct adf_hw_device_data *self)
-{
-	return ADF_DH895XCC_ETR_BAR;
-}
-
-static u32 get_sram_bar_id(struct adf_hw_device_data *self)
-{
-	return ADF_DH895XCC_SRAM_BAR;
-}
-
-static u32 get_accel_cap(struct adf_accel_dev *accel_dev)
-{
-	struct pci_dev *pdev = accel_dev->accel_pci_dev.pci_dev;
-	u32 capabilities;
-	u32 legfuses;
-
-	capabilities = ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC |
-		       ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC |
-		       ICP_ACCEL_CAPABILITIES_AUTHENTICATION |
-		       ICP_ACCEL_CAPABILITIES_CIPHER |
-		       ICP_ACCEL_CAPABILITIES_COMPRESSION;
-
-	/* Read accelerator capabilities mask */
-	pci_read_config_dword(pdev, ADF_DEVICE_LEGFUSE_OFFSET, &legfuses);
-
-	/* A set bit in legfuses means the feature is OFF in this SKU */
-	if (legfuses & ICP_ACCEL_MASK_CIPHER_SLICE) {
-		capabilities &= ~ICP_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC;
-		capabilities &= ~ICP_ACCEL_CAPABILITIES_CIPHER;
-	}
-	if (legfuses & ICP_ACCEL_MASK_PKE_SLICE)
-		capabilities &= ~ICP_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC;
-	if (legfuses & ICP_ACCEL_MASK_AUTH_SLICE) {
-		capabilities &= ~ICP_ACCEL_CAPABILITIES_AUTHENTICATION;
-		capabilities &= ~ICP_ACCEL_CAPABILITIES_CIPHER;
-	}
-	if (legfuses & ICP_ACCEL_MASK_COMPRESS_SLICE)
-		capabilities &= ~ICP_ACCEL_CAPABILITIES_COMPRESSION;
-
-	return capabilities;
-}
-
-static enum dev_sku_info get_sku(struct adf_hw_device_data *self)
-{
-	int sku = (self->fuses & ADF_DH895XCC_FUSECTL_SKU_MASK)
-	    >> ADF_DH895XCC_FUSECTL_SKU_SHIFT;
-
-	switch (sku) {
-	case ADF_DH895XCC_FUSECTL_SKU_1:
-		return DEV_SKU_1;
-	case ADF_DH895XCC_FUSECTL_SKU_2:
-		return DEV_SKU_2;
-	case ADF_DH895XCC_FUSECTL_SKU_3:
-		return DEV_SKU_3;
-	case ADF_DH895XCC_FUSECTL_SKU_4:
-		return DEV_SKU_4;
-	default:
-		return DEV_SKU_UNKNOWN;
-	}
-	return DEV_SKU_UNKNOWN;
-}
-
-static const u32 *adf_get_arbiter_mapping(struct adf_accel_dev *accel_dev)
-{
-	return thrd_to_arb_map;
-}
-
-static void enable_vf2pf_interrupts(void __iomem *pmisc_addr, u32 vf_mask)
-{
-	/* Enable VF2PF Messaging Ints - VFs 0 through 15 per vf_mask[15:0] */
-	if (vf_mask & 0xFFFF) {
-		u32 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3)
-			  & ~ADF_DH895XCC_ERR_MSK_VF2PF_L(vf_mask);
-		ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, val);
-	}
-
-	/* Enable VF2PF Messaging Ints - VFs 16 through 31 per vf_mask[31:16] */
-	if (vf_mask >> 16) {
-		u32 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK5)
-			  & ~ADF_DH895XCC_ERR_MSK_VF2PF_U(vf_mask);
-		ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK5, val);
-	}
-}
-
-static void disable_all_vf2pf_interrupts(void __iomem *pmisc_addr)
-{
-	u32 val;
-
-	/* Disable VF2PF interrupts for VFs 0 through 15 per vf_mask[15:0] */
-	val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3)
-	      | ADF_DH895XCC_ERR_MSK_VF2PF_L(ADF_DH895XCC_VF_MSK);
-	ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, val);
-
-	/* Disable VF2PF interrupts for VFs 16 through 31 per vf_mask[31:16] */
-	val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK5)
-	      | ADF_DH895XCC_ERR_MSK_VF2PF_U(ADF_DH895XCC_VF_MSK);
-	ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK5, val);
-}
-
-static u32 disable_pending_vf2pf_interrupts(void __iomem *pmisc_addr)
-{
-	u32 sources, pending, disabled;
-	u32 errsou3, errmsk3;
-	u32 errsou5, errmsk5;
-
-	/* Get the interrupt sources triggered by VFs */
-	errsou3 = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRSOU3);
-	errsou5 = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRSOU5);
-	sources = ADF_DH895XCC_ERR_REG_VF2PF_L(errsou3)
-		  | ADF_DH895XCC_ERR_REG_VF2PF_U(errsou5);
-
-	if (!sources)
-		return 0;
-
-	/* Get the already disabled interrupts */
-	errmsk3 = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3);
-	errmsk5 = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK5);
-	disabled = ADF_DH895XCC_ERR_REG_VF2PF_L(errmsk3)
-		   | ADF_DH895XCC_ERR_REG_VF2PF_U(errmsk5);
-
-	pending = sources & ~disabled;
-	if (!pending)
-		return 0;
-
-	/* Due to HW limitations, when disabling the interrupts, we can't
-	 * just disable the requested sources, as this would lead to missed
-	 * interrupts if sources changes just before writing to ERRMSK3 and
-	 * ERRMSK5.
-	 * To work around it, disable all and re-enable only the sources that
-	 * are not in vf_mask and were not already disabled. Re-enabling will
-	 * trigger a new interrupt for the sources that have changed in the
-	 * meantime, if any.
-	 */
-	errmsk3 |= ADF_DH895XCC_ERR_MSK_VF2PF_L(ADF_DH895XCC_VF_MSK);
-	errmsk5 |= ADF_DH895XCC_ERR_MSK_VF2PF_U(ADF_DH895XCC_VF_MSK);
-	ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, errmsk3);
-	ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK5, errmsk5);
-
-	errmsk3 &= ADF_DH895XCC_ERR_MSK_VF2PF_L(sources | disabled);
-	errmsk5 &= ADF_DH895XCC_ERR_MSK_VF2PF_U(sources | disabled);
-	ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, errmsk3);
-	ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK5, errmsk5);
-
-	/* Return the sources of the (new) interrupt(s) */
-	return pending;
-}
-
-static void configure_iov_threads(struct adf_accel_dev *accel_dev, bool enable)
-{
-	adf_gen2_cfg_iov_thds(accel_dev, enable,
-			      ADF_DH895XCC_AE2FUNC_MAP_GRP_A_NUM_REGS,
-			      ADF_DH895XCC_AE2FUNC_MAP_GRP_B_NUM_REGS);
-}
-
-void adf_init_hw_data_dh895xcc(struct adf_hw_device_data *hw_data)
-{
-	hw_data->dev_class = &dh895xcc_class;
-	hw_data->instance_id = dh895xcc_class.instances++;
-	hw_data->num_banks = ADF_DH895XCC_ETR_MAX_BANKS;
-	hw_data->num_rings_per_bank = ADF_ETR_MAX_RINGS_PER_BANK;
-	hw_data->num_accel = ADF_DH895XCC_MAX_ACCELERATORS;
-	hw_data->num_logical_accel = 1;
-	hw_data->num_engines = ADF_DH895XCC_MAX_ACCELENGINES;
-	hw_data->tx_rx_gap = ADF_GEN2_RX_RINGS_OFFSET;
-	hw_data->tx_rings_mask = ADF_GEN2_TX_RINGS_MASK;
-	hw_data->ring_to_svc_map = ADF_GEN2_DEFAULT_RING_TO_SRV_MAP;
-	hw_data->alloc_irq = adf_isr_resource_alloc;
-	hw_data->free_irq = adf_isr_resource_free;
-	hw_data->enable_error_correction = adf_gen2_enable_error_correction;
-	hw_data->get_accel_mask = get_accel_mask;
-	hw_data->get_ae_mask = get_ae_mask;
-	hw_data->get_accel_cap = get_accel_cap;
-	hw_data->get_num_accels = adf_gen2_get_num_accels;
-	hw_data->get_num_aes = adf_gen2_get_num_aes;
-	hw_data->get_etr_bar_id = get_etr_bar_id;
-	hw_data->get_misc_bar_id = get_misc_bar_id;
-	hw_data->get_admin_info = adf_gen2_get_admin_info;
-	hw_data->get_arb_info = adf_gen2_get_arb_info;
-	hw_data->get_sram_bar_id = get_sram_bar_id;
-	hw_data->get_sku = get_sku;
-	hw_data->fw_name = ADF_DH895XCC_FW;
-	hw_data->fw_mmp_name = ADF_DH895XCC_MMP;
-	hw_data->init_admin_comms = adf_init_admin_comms;
-	hw_data->exit_admin_comms = adf_exit_admin_comms;
-	hw_data->configure_iov_threads = configure_iov_threads;
-	hw_data->send_admin_init = adf_send_admin_init;
-	hw_data->init_arb = adf_init_arb;
-	hw_data->exit_arb = adf_exit_arb;
-	hw_data->get_arb_mapping = adf_get_arbiter_mapping;
-	hw_data->enable_ints = adf_gen2_enable_ints;
-	hw_data->reset_device = adf_reset_sbr;
-	hw_data->disable_iov = adf_disable_sriov;
-	hw_data->dev_config = adf_gen2_dev_config;
-
-	adf_gen2_init_pf_pfvf_ops(&hw_data->pfvf_ops);
-	hw_data->pfvf_ops.enable_vf2pf_interrupts = enable_vf2pf_interrupts;
-	hw_data->pfvf_ops.disable_all_vf2pf_interrupts = disable_all_vf2pf_interrupts;
-	hw_data->pfvf_ops.disable_pending_vf2pf_interrupts = disable_pending_vf2pf_interrupts;
-	adf_gen2_init_hw_csr_ops(&hw_data->csr_ops);
-	adf_gen2_init_dc_ops(&hw_data->dc_ops);
-}
-
-void adf_clean_hw_data_dh895xcc(struct adf_hw_device_data *hw_data)
-{
-	hw_data->dev_class->instances--;
-}
diff --git a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h
deleted file mode 100644
index 7b674bbe4192..000000000000
--- a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */
-/* Copyright(c) 2014 - 2020 Intel Corporation */
-#ifndef ADF_DH895x_HW_DATA_H_
-#define ADF_DH895x_HW_DATA_H_
-
-/* PCIe configuration space */
-#define ADF_DH895XCC_SRAM_BAR 0
-#define ADF_DH895XCC_PMISC_BAR 1
-#define ADF_DH895XCC_ETR_BAR 2
-#define ADF_DH895XCC_FUSECTL_SKU_MASK 0x300000
-#define ADF_DH895XCC_FUSECTL_SKU_SHIFT 20
-#define ADF_DH895XCC_FUSECTL_SKU_1 0x0
-#define ADF_DH895XCC_FUSECTL_SKU_2 0x1
-#define ADF_DH895XCC_FUSECTL_SKU_3 0x2
-#define ADF_DH895XCC_FUSECTL_SKU_4 0x3
-#define ADF_DH895XCC_MAX_ACCELERATORS 6
-#define ADF_DH895XCC_MAX_ACCELENGINES 12
-#define ADF_DH895XCC_ACCELERATORS_REG_OFFSET 13
-#define ADF_DH895XCC_ACCELERATORS_MASK 0x3F
-#define ADF_DH895XCC_ACCELENGINES_MASK 0xFFF
-#define ADF_DH895XCC_ETR_MAX_BANKS 32
-
-/* Masks for VF2PF interrupts */
-#define ADF_DH895XCC_ERR_REG_VF2PF_L(vf_src)	(((vf_src) & 0x01FFFE00) >> 9)
-#define ADF_DH895XCC_ERR_MSK_VF2PF_L(vf_mask)	(((vf_mask) & 0xFFFF) << 9)
-#define ADF_DH895XCC_ERR_REG_VF2PF_U(vf_src)	(((vf_src) & 0x0000FFFF) << 16)
-#define ADF_DH895XCC_ERR_MSK_VF2PF_U(vf_mask)	((vf_mask) >> 16)
-
-/* AE to function mapping */
-#define ADF_DH895XCC_AE2FUNC_MAP_GRP_A_NUM_REGS 96
-#define ADF_DH895XCC_AE2FUNC_MAP_GRP_B_NUM_REGS 12
-
-/* FW names */
-#define ADF_DH895XCC_FW "qat_895xcc.bin"
-#define ADF_DH895XCC_MMP "qat_895xcc_mmp.bin"
-
-void adf_init_hw_data_dh895xcc(struct adf_hw_device_data *hw_data);
-void adf_clean_hw_data_dh895xcc(struct adf_hw_device_data *hw_data);
-#endif
diff --git a/drivers/crypto/qat/qat_dh895xcc/adf_drv.c b/drivers/crypto/qat/qat_dh895xcc/adf_drv.c
deleted file mode 100644
index e18860ab5c8e..000000000000
--- a/drivers/crypto/qat/qat_dh895xcc/adf_drv.c
+++ /dev/null
@@ -1,258 +0,0 @@
-// SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)
-/* Copyright(c) 2014 - 2020 Intel Corporation */
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/pci.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/fs.h>
-#include <linux/slab.h>
-#include <linux/errno.h>
-#include <linux/device.h>
-#include <linux/dma-mapping.h>
-#include <linux/platform_device.h>
-#include <linux/workqueue.h>
-#include <linux/io.h>
-#include <adf_accel_devices.h>
-#include <adf_common_drv.h>
-#include <adf_cfg.h>
-#include "adf_dh895xcc_hw_data.h"
-
-static const struct pci_device_id adf_pci_tbl[] = {
-	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_QAT_DH895XCC), },
-	{ }
-};
-MODULE_DEVICE_TABLE(pci, adf_pci_tbl);
-
-static int adf_probe(struct pci_dev *dev, const struct pci_device_id *ent);
-static void adf_remove(struct pci_dev *dev);
-
-static struct pci_driver adf_driver = {
-	.id_table = adf_pci_tbl,
-	.name = ADF_DH895XCC_DEVICE_NAME,
-	.probe = adf_probe,
-	.remove = adf_remove,
-	.sriov_configure = adf_sriov_configure,
-	.err_handler = &adf_err_handler,
-};
-
-static void adf_cleanup_pci_dev(struct adf_accel_dev *accel_dev)
-{
-	pci_release_regions(accel_dev->accel_pci_dev.pci_dev);
-	pci_disable_device(accel_dev->accel_pci_dev.pci_dev);
-}
-
-static void adf_cleanup_accel(struct adf_accel_dev *accel_dev)
-{
-	struct adf_accel_pci *accel_pci_dev = &accel_dev->accel_pci_dev;
-	int i;
-
-	for (i = 0; i < ADF_PCI_MAX_BARS; i++) {
-		struct adf_bar *bar = &accel_pci_dev->pci_bars[i];
-
-		if (bar->virt_addr)
-			pci_iounmap(accel_pci_dev->pci_dev, bar->virt_addr);
-	}
-
-	if (accel_dev->hw_device) {
-		switch (accel_pci_dev->pci_dev->device) {
-		case PCI_DEVICE_ID_INTEL_QAT_DH895XCC:
-			adf_clean_hw_data_dh895xcc(accel_dev->hw_device);
-			break;
-		default:
-			break;
-		}
-		kfree(accel_dev->hw_device);
-		accel_dev->hw_device = NULL;
-	}
-	adf_cfg_dev_remove(accel_dev);
-	debugfs_remove(accel_dev->debugfs_dir);
-	adf_devmgr_rm_dev(accel_dev, NULL);
-}
-
-static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
-{
-	struct adf_accel_dev *accel_dev;
-	struct adf_accel_pci *accel_pci_dev;
-	struct adf_hw_device_data *hw_data;
-	char name[ADF_DEVICE_NAME_LENGTH];
-	unsigned int i, bar_nr;
-	unsigned long bar_mask;
-	int ret;
-
-	switch (ent->device) {
-	case PCI_DEVICE_ID_INTEL_QAT_DH895XCC:
-		break;
-	default:
-		dev_err(&pdev->dev, "Invalid device 0x%x.\n", ent->device);
-		return -ENODEV;
-	}
-
-	if (num_possible_nodes() > 1 && dev_to_node(&pdev->dev) < 0) {
-		/* If the accelerator is connected to a node with no memory
-		 * there is no point in using the accelerator since the remote
-		 * memory transaction will be very slow. */
-		dev_err(&pdev->dev, "Invalid NUMA configuration.\n");
-		return -EINVAL;
-	}
-
-	accel_dev = kzalloc_node(sizeof(*accel_dev), GFP_KERNEL,
-				 dev_to_node(&pdev->dev));
-	if (!accel_dev)
-		return -ENOMEM;
-
-	INIT_LIST_HEAD(&accel_dev->crypto_list);
-	accel_pci_dev = &accel_dev->accel_pci_dev;
-	accel_pci_dev->pci_dev = pdev;
-
-	/* Add accel device to accel table.
-	 * This should be called before adf_cleanup_accel is called */
-	if (adf_devmgr_add_dev(accel_dev, NULL)) {
-		dev_err(&pdev->dev, "Failed to add new accelerator device.\n");
-		kfree(accel_dev);
-		return -EFAULT;
-	}
-
-	accel_dev->owner = THIS_MODULE;
-	/* Allocate and configure device configuration structure */
-	hw_data = kzalloc_node(sizeof(*hw_data), GFP_KERNEL,
-			       dev_to_node(&pdev->dev));
-	if (!hw_data) {
-		ret = -ENOMEM;
-		goto out_err;
-	}
-
-	accel_dev->hw_device = hw_data;
-	adf_init_hw_data_dh895xcc(accel_dev->hw_device);
-	pci_read_config_byte(pdev, PCI_REVISION_ID, &accel_pci_dev->revid);
-	pci_read_config_dword(pdev, ADF_DEVICE_FUSECTL_OFFSET,
-			      &hw_data->fuses);
-
-	/* Get Accelerators and Accelerators Engines masks */
-	hw_data->accel_mask = hw_data->get_accel_mask(hw_data);
-	hw_data->ae_mask = hw_data->get_ae_mask(hw_data);
-	accel_pci_dev->sku = hw_data->get_sku(hw_data);
-	/* If the device has no acceleration engines then ignore it. */
-	if (!hw_data->accel_mask || !hw_data->ae_mask ||
-	    ((~hw_data->ae_mask) & 0x01)) {
-		dev_err(&pdev->dev, "No acceleration units found");
-		ret = -EFAULT;
-		goto out_err;
-	}
-
-	/* Create dev top level debugfs entry */
-	snprintf(name, sizeof(name), "%s%s_%s", ADF_DEVICE_NAME_PREFIX,
-		 hw_data->dev_class->name, pci_name(pdev));
-
-	accel_dev->debugfs_dir = debugfs_create_dir(name, NULL);
-
-	/* Create device configuration table */
-	ret = adf_cfg_dev_add(accel_dev);
-	if (ret)
-		goto out_err;
-
-	pcie_set_readrq(pdev, 1024);
-
-	/* enable PCI device */
-	if (pci_enable_device(pdev)) {
-		ret = -EFAULT;
-		goto out_err;
-	}
-
-	/* set dma identifier */
-	ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48));
-	if (ret) {
-		dev_err(&pdev->dev, "No usable DMA configuration\n");
-		goto out_err_disable;
-	}
-
-	if (pci_request_regions(pdev, ADF_DH895XCC_DEVICE_NAME)) {
-		ret = -EFAULT;
-		goto out_err_disable;
-	}
-
-	/* Get accelerator capabilities mask */
-	hw_data->accel_capabilities_mask = hw_data->get_accel_cap(accel_dev);
-
-	/* Find and map all the device's BARS */
-	i = 0;
-	bar_mask = pci_select_bars(pdev, IORESOURCE_MEM);
-	for_each_set_bit(bar_nr, &bar_mask, ADF_PCI_MAX_BARS * 2) {
-		struct adf_bar *bar = &accel_pci_dev->pci_bars[i++];
-
-		bar->base_addr = pci_resource_start(pdev, bar_nr);
-		if (!bar->base_addr)
-			break;
-		bar->size = pci_resource_len(pdev, bar_nr);
-		bar->virt_addr = pci_iomap(accel_pci_dev->pci_dev, bar_nr, 0);
-		if (!bar->virt_addr) {
-			dev_err(&pdev->dev, "Failed to map BAR %d\n", bar_nr);
-			ret = -EFAULT;
-			goto out_err_free_reg;
-		}
-	}
-	pci_set_master(pdev);
-
-	if (pci_save_state(pdev)) {
-		dev_err(&pdev->dev, "Failed to save pci state\n");
-		ret = -ENOMEM;
-		goto out_err_free_reg;
-	}
-
-	ret = adf_dev_up(accel_dev, true);
-	if (ret)
-		goto out_err_dev_stop;
-
-	return ret;
-
-out_err_dev_stop:
-	adf_dev_down(accel_dev, false);
-out_err_free_reg:
-	pci_release_regions(accel_pci_dev->pci_dev);
-out_err_disable:
-	pci_disable_device(accel_pci_dev->pci_dev);
-out_err:
-	adf_cleanup_accel(accel_dev);
-	kfree(accel_dev);
-	return ret;
-}
-
-static void adf_remove(struct pci_dev *pdev)
-{
-	struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);
-
-	if (!accel_dev) {
-		pr_err("QAT: Driver removal failed\n");
-		return;
-	}
-	adf_dev_down(accel_dev, false);
-	adf_cleanup_accel(accel_dev);
-	adf_cleanup_pci_dev(accel_dev);
-	kfree(accel_dev);
-}
-
-static int __init adfdrv_init(void)
-{
-	request_module("intel_qat");
-
-	if (pci_register_driver(&adf_driver)) {
-		pr_err("QAT: Driver initialization failed\n");
-		return -EFAULT;
-	}
-	return 0;
-}
-
-static void __exit adfdrv_release(void)
-{
-	pci_unregister_driver(&adf_driver);
-}
-
-module_init(adfdrv_init);
-module_exit(adfdrv_release);
-
-MODULE_LICENSE("Dual BSD/GPL");
-MODULE_AUTHOR("Intel");
-MODULE_FIRMWARE(ADF_DH895XCC_FW);
-MODULE_FIRMWARE(ADF_DH895XCC_MMP);
-MODULE_DESCRIPTION("Intel(R) QuickAssist Technology");
-MODULE_VERSION(ADF_DRV_VERSION);