diff options
| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2016-03-18 16:24:46 +0200 |
|---|---|---|
| committer | Vinod Koul <vinod.koul@intel.com> | 2016-04-13 21:36:10 +0530 |
| commit | 897e40d3b19c9ea2013aee419302c0f6e9ae287e (patch) | |
| tree | 3fdf26a3e54c9119db059d03deb97eb9a113c0f0 /drivers/dma/dw | |
| parent | a3e557999be74810e02be1d0c107096b7aa48ece (diff) | |
dmaengine: dw: substitute dma_read_byaddr by dma_readl_native
Since struct dw_dma is allocated and regs member is assigned properly we can
use standard IO accessors to the DMA registers.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/dw')
| -rw-r--r-- | drivers/dma/dw/core.c | 8 | ||||
| -rw-r--r-- | drivers/dma/dw/regs.h | 4 |
2 files changed, 3 insertions, 9 deletions
diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c index db9b6f433148..93d8d553c686 100644 --- a/drivers/dma/dw/core.c +++ b/drivers/dma/dw/core.c @@ -1529,7 +1529,7 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata) pm_runtime_get_sync(chip->dev); if (!pdata) { - dw_params = dma_read_byaddr(chip->regs, DW_PARAMS); + dw_params = dma_readl(dw, DW_PARAMS); dev_dbg(chip->dev, "DW_PARAMS: 0x%08x\n", dw_params); autocfg = dw_params >> DW_PARAMS_EN & 1; @@ -1629,11 +1629,9 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata) /* Hardware configuration */ if (autocfg) { - unsigned int dwc_params; unsigned int r = DW_DMA_MAX_NR_CHANNELS - i - 1; - void __iomem *addr = chip->regs + r * sizeof(u32); - - dwc_params = dma_read_byaddr(addr, DWC_PARAMS); + void __iomem *addr = &__dw_regs(dw)->DWC_PARAMS[r]; + unsigned int dwc_params = dma_readl_native(addr); dev_dbg(chip->dev, "DWC_PARAMS[%d]: 0x%08x\n", i, dwc_params); diff --git a/drivers/dma/dw/regs.h b/drivers/dma/dw/regs.h index 59d6cec01dca..feb3a4a7623b 100644 --- a/drivers/dma/dw/regs.h +++ b/drivers/dma/dw/regs.h @@ -114,10 +114,6 @@ struct dw_dma_regs { #define dma_writel_native writel #endif -/* To access the registers in early stage of probe */ -#define dma_read_byaddr(addr, name) \ - dma_readl_native((addr) + offsetof(struct dw_dma_regs, name)) - /* Bitfields in DW_PARAMS */ #define DW_PARAMS_NR_CHAN 8 /* number of channels */ #define DW_PARAMS_NR_MASTER 11 /* number of AHB masters */ |