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authorStephen Warren <swarren@nvidia.com>2012-03-19 10:31:58 -0600
committerStephen Warren <swarren@nvidia.com>2012-04-18 10:26:38 -0600
commitd941136fc6ead10a7ff319bad199869b593962c5 (patch)
treeabb5aa312d0329170c599f60869126e01d9308a4 /drivers/gpio/gpio-tegra.c
parent4bee6417c9444ca62e67956dcbcf25fe20feb869 (diff)
gpio: tegra: configure pins during irq_set_type
When a Tegra GPIO is used as an IRQ, it should be enabled as a GPIO (so the pinmux module isn't driving it as an output) and configured as a GPIO input (so the GPIO module isn't driving it as an output). Set this up automatically whenever an IRQ is requested, so that users of IRQs don't need to do this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'drivers/gpio/gpio-tegra.c')
-rw-r--r--drivers/gpio/gpio-tegra.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c
index 12f349b3830d..4383a7205349 100644
--- a/drivers/gpio/gpio-tegra.c
+++ b/drivers/gpio/gpio-tegra.c
@@ -224,6 +224,9 @@ static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type)
spin_unlock_irqrestore(&bank->lvl_lock[port], flags);
+ tegra_gpio_mask_write(GPIO_MSK_OE(gpio), gpio, 0);
+ tegra_gpio_enable(gpio);
+
if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
__irq_set_handler_locked(d->irq, handle_level_irq);
else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))