diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2018-06-19 16:11:56 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2018-09-10 22:47:34 -0500 |
| commit | 6fdd68b14a943ead1d0ce1c0c7023cd2dbfde4c2 (patch) | |
| tree | 921555fbb9f3274f1984c9de9fd6b10fe0e567a2 /drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | |
| parent | bf0a60b78b61a7b31bb22e60cc7b2e7fc538d38f (diff) | |
drm/amdgpu/gmc9: Adjust GART and AGP location with xgmi offset (v2)
On hives with xgmi enabled, the fb_location aperture is a size
which defines the total framebuffer size of all nodes in the
hive. Each GPU in the hive has the same view via the fb_location
aperture. GPU0 starts at offset (0 * segment size),
GPU1 starts at offset (1 * segment size), etc.
For access to local vram on each GPU, we need to take this offset into
account. This including on setting up GPUVM page table and GART table
v2: squash in "drm/amdgpu: Init correct fb region for none XGMI configuration"
Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Slava Abramov <slava.abramov@amd.com>
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 25 |
1 files changed, 15 insertions, 10 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c index 6acdeebabfc0..ae4467113240 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c @@ -121,6 +121,11 @@ void amdgpu_gmc_vram_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc, mc->vram_end = mc->vram_start + mc->mc_vram_size - 1; if (limit && limit < mc->real_vram_size) mc->real_vram_size = limit; + + if (mc->xgmi.num_physical_nodes == 0) { + mc->fb_start = mc->vram_start; + mc->fb_end = mc->vram_end; + } dev_info(adev->dev, "VRAM: %lluM 0x%016llX - 0x%016llX (%lluM used)\n", mc->mc_vram_size >> 20, mc->vram_start, mc->vram_end, mc->real_vram_size >> 20); @@ -147,8 +152,8 @@ void amdgpu_gmc_gart_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc) /* VCE doesn't like it when BOs cross a 4GB segment, so align * the GART base on a 4GB boundary as well. */ - size_bf = mc->vram_start; - size_af = adev->gmc.mc_mask + 1 - ALIGN(mc->vram_end + 1, four_gb); + size_bf = mc->fb_start; + size_af = adev->gmc.mc_mask + 1 - ALIGN(mc->fb_end + 1, four_gb); if (mc->gart_size > max(size_bf, size_af)) { dev_warn(adev->dev, "limiting GART\n"); @@ -184,23 +189,23 @@ void amdgpu_gmc_agp_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc) const uint64_t sixteen_gb_mask = ~(sixteen_gb - 1); u64 size_af, size_bf; - if (mc->vram_start > mc->gart_start) { - size_bf = (mc->vram_start & sixteen_gb_mask) - + if (mc->fb_start > mc->gart_start) { + size_bf = (mc->fb_start & sixteen_gb_mask) - ALIGN(mc->gart_end + 1, sixteen_gb); - size_af = mc->mc_mask + 1 - ALIGN(mc->vram_end + 1, sixteen_gb); + size_af = mc->mc_mask + 1 - ALIGN(mc->fb_end + 1, sixteen_gb); } else { - size_bf = mc->vram_start & sixteen_gb_mask; + size_bf = mc->fb_start & sixteen_gb_mask; size_af = (mc->gart_start & sixteen_gb_mask) - - ALIGN(mc->vram_end + 1, sixteen_gb); + ALIGN(mc->fb_end + 1, sixteen_gb); } if (size_bf > size_af) { - mc->agp_start = mc->vram_start > mc->gart_start ? + mc->agp_start = mc->fb_start > mc->gart_start ? mc->gart_end + 1 : 0; mc->agp_size = size_bf; } else { - mc->agp_start = (mc->vram_start > mc->gart_start ? - mc->vram_end : mc->gart_end) + 1, + mc->agp_start = (mc->fb_start > mc->gart_start ? + mc->fb_end : mc->gart_end) + 1, mc->agp_size = size_af; } |