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authorAlex Deucher <alexander.deucher@amd.com>2025-04-29 15:27:20 -0400
committerAlex Deucher <alexander.deucher@amd.com>2025-04-30 18:16:14 -0400
commit2e828a25f850f1b7bd9be61fdac07bf6901b0d08 (patch)
treec9a4d5c6307472c5586297fe09b6e7673e4a563d /drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
parent2408b0272b042e751b6a3cbbc14bb638bccfcefc (diff)
drm/amdgpu/mes: use correct MES pipe for resets
Use the KIQ pipe for kernel queues and the SCHED pipe for user queues. Fixes: 2408b0272b04 ("drm/amdgpu/mes: consolidate on a single mes reset callback") Cc: Michael Chen <Michael.Chen@amd.com> Cc: Shaoyun Liu <Shaoyun.Liu@amd.com> Reviewed-by: Michael Chen <michael.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
index 5de0d6c528f4..2febb63ab232 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
@@ -349,6 +349,7 @@ int amdgpu_mes_reset_legacy_queue(struct amdgpu_device *adev,
queue_input.wptr_addr = ring->wptr_gpu_addr;
queue_input.vmid = vmid;
queue_input.use_mmio = use_mmio;
+ queue_input.is_kq = true;
if (ring->funcs->type == AMDGPU_RING_TYPE_GFX)
queue_input.legacy_gfx = true;