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authorAndrey Grodzovsky <andrey.grodzovsky@amd.com>2019-09-09 15:59:45 -0400
committerAlex Deucher <alexander.deucher@amd.com>2019-09-16 10:06:27 -0500
commitd01b400b1aaeb37eb28a1df22f548309ab35d482 (patch)
tree3d0a0fe97e37ff4ea3bee09028c0ee04bb043fab /drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
parentd99659a062316bc95269a52f2428a7ad96ee4315 (diff)
drm/amdgpu: Add amdgpu_ras_eeprom_reset_table
This will allow to reset the table on the fly. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c25
1 files changed, 17 insertions, 8 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
index 43dd4ab9b6d5..11a8445cf734 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
@@ -102,6 +102,22 @@ static int __update_table_header(struct amdgpu_ras_eeprom_control *control,
static uint32_t __calc_hdr_byte_sum(struct amdgpu_ras_eeprom_control *control);
+int amdgpu_ras_eeprom_reset_table(struct amdgpu_ras_eeprom_control *control)
+{
+ unsigned char buff[EEPROM_ADDRESS_SIZE + EEPROM_TABLE_HEADER_SIZE] = { 0 };
+ struct amdgpu_device *adev = to_amdgpu_device(control);
+ struct amdgpu_ras_eeprom_table_header *hdr = &control->tbl_hdr;
+
+ hdr->header = EEPROM_TABLE_HDR_VAL;
+ hdr->version = EEPROM_TABLE_VER;
+ hdr->first_rec_offset = EEPROM_RECORD_START;
+ hdr->tbl_size = EEPROM_TABLE_HEADER_SIZE;
+
+ adev->psp.ras.ras->eeprom_control.tbl_byte_sum =
+ __calc_hdr_byte_sum(&adev->psp.ras.ras->eeprom_control);
+ return __update_table_header(control, buff);
+}
+
int amdgpu_ras_eeprom_init(struct amdgpu_ras_eeprom_control *control)
{
int ret = 0;
@@ -149,14 +165,7 @@ int amdgpu_ras_eeprom_init(struct amdgpu_ras_eeprom_control *control)
} else {
DRM_INFO("Creating new EEPROM table");
- hdr->header = EEPROM_TABLE_HDR_VAL;
- hdr->version = EEPROM_TABLE_VER;
- hdr->first_rec_offset = EEPROM_RECORD_START;
- hdr->tbl_size = EEPROM_TABLE_HEADER_SIZE;
-
- adev->psp.ras.ras->eeprom_control.tbl_byte_sum =
- __calc_hdr_byte_sum(&adev->psp.ras.ras->eeprom_control);
- ret = __update_table_header(control, buff);
+ ret = amdgpu_ras_eeprom_reset_table(control);
}
/* Start inserting records from here */