summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
diff options
context:
space:
mode:
authorPixel Ding <Pixel.Ding@amd.com>2017-12-11 16:48:33 +0800
committerAlex Deucher <alexander.deucher@amd.com>2017-12-12 14:45:47 -0500
commit2ffe31deb27579e2f2c9444e01f4d8abf385d145 (patch)
tree30b712dbe3053fd00219ad99a36eceb2d2b5d5da /drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
parentb852f3d3fb5d770f54c10614e6320a29943eb52f (diff)
drm/amdgpu: use polling mem to set SDMA3 wptr for VF
On Tonga VF, there're 2 sources updating wptr registers for sdma3: 1) polling mem and 2) doorbell. When doorbell and polling mem are both enabled on sdma3, there will be collision hit in occasion between those two sources when ucode and h/w are doing the updating on wptr register in parallel. Issue doesn't happen on CP GFX/Compute since CP drops all doorbell writes when VF is inactive. So enable polling mem and don't use doorbell for SDMA3. Signed-off-by: Pixel Ding <Pixel.Ding@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index 641e3fd7ba3c..010f69084af5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -186,6 +186,7 @@ struct amdgpu_ring {
uint64_t eop_gpu_addr;
u32 doorbell_index;
bool use_doorbell;
+ bool use_pollmem;
unsigned wptr_offs;
unsigned fence_offs;
uint64_t current_ctx;