diff options
| author | Xiaojie Yuan <xiaojie.yuan@amd.com> | 2019-06-11 11:16:54 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-08-02 10:30:40 -0500 |
| commit | 716e9bb099c52efe5290c0b1f329e855b453663a (patch) | |
| tree | 0112ffe4fab176efae70684f1b47e7a1c2955153 /drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | |
| parent | 92c123aec1a28439c31a38500f35fef391b5953b (diff) | |
drm/amdgpu/gfx10: add placeholder for navi12 golden settings
Not used yet.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c index 94bae62911fc..754a212f4381 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c @@ -174,6 +174,11 @@ static const struct soc15_reg_golden golden_settings_gc_10_1_nv14[] = /* Pending on emulation bring up */ }; +static const struct soc15_reg_golden golden_settings_gc_10_1_nv12[] = +{ + /* Pending on emulation bring up */ +}; + #define DEFAULT_SH_MEM_CONFIG \ ((SH_MEM_ADDRESS_MODE_64 << SH_MEM_CONFIG__ADDRESS_MODE__SHIFT) | \ (SH_MEM_ALIGNMENT_MODE_UNALIGNED << SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT) | \ @@ -323,6 +328,14 @@ static void gfx_v10_0_init_golden_registers(struct amdgpu_device *adev) golden_settings_gc_10_1_nv14, (const u32)ARRAY_SIZE(golden_settings_gc_10_1_nv14)); break; + case CHIP_NAVI12: + soc15_program_register_sequence(adev, + golden_settings_gc_10_1, + (const u32)ARRAY_SIZE(golden_settings_gc_10_1)); + soc15_program_register_sequence(adev, + golden_settings_gc_10_1_nv12, + (const u32)ARRAY_SIZE(golden_settings_gc_10_1_nv12)); + break; default: break; } |