summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
diff options
context:
space:
mode:
authorHawking Zhang <Hawking.Zhang@amd.com>2019-09-03 05:24:35 +0800
committerAlex Deucher <alexander.deucher@amd.com>2019-09-13 17:41:36 -0500
commita85eff14da2c700ffcd68b3bf1a07f8a5deda624 (patch)
treed343b259904fd1692d2410d41f382ec230000aa7 /drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
parentd094aea312580f12232b546523dae20f54445469 (diff)
drm/amdgpu/gmc: switch to amdgpu_gmc_ras_late_init helper function
amdgpu_gmc_ras_late_init is used to init gmc specfic ras debugfs/sysfs node and gmc specific interrupt handler. It can be shared among gmc generations. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c36
1 files changed, 2 insertions, 34 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index ba149554b508..0899fc847ed9 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -771,39 +771,13 @@ static int gmc_v9_0_ecc_late_init(void *handle)
{
int r;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
- struct ras_fs_if umc_fs_info = {
- .sysfs_name = "umc_err_count",
- .debugfs_name = "umc_err_inject",
- };
struct ras_ih_if umc_ih_info = {
.cb = gmc_v9_0_process_ras_data_cb,
};
- if (!adev->gmc.umc_ras_if) {
- adev->gmc.umc_ras_if = kmalloc(sizeof(struct ras_common_if), GFP_KERNEL);
- if (!adev->gmc.umc_ras_if)
- return -ENOMEM;
- adev->gmc.umc_ras_if->block = AMDGPU_RAS_BLOCK__UMC;
- adev->gmc.umc_ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
- adev->gmc.umc_ras_if->sub_block_index = 0;
- strcpy(adev->gmc.umc_ras_if->name, "umc");
- }
- umc_ih_info.head = umc_fs_info.head = *adev->gmc.umc_ras_if;
-
- r = amdgpu_ras_late_init(adev, adev->gmc.umc_ras_if,
- &umc_fs_info, &umc_ih_info);
+ r = amdgpu_gmc_ras_late_init(adev, &umc_ih_info);
if (r)
- goto free;
-
- if (amdgpu_ras_is_supported(adev, adev->gmc.umc_ras_if->block)) {
- r = amdgpu_irq_get(adev, &adev->gmc.ecc_irq, 0);
- if (r)
- goto umc_late_fini;
- } else {
- /* free umc ras_if if umc ras is not supported */
- r = 0;
- goto free;
- }
+ return r;
if (adev->mmhub_funcs && adev->mmhub_funcs->ras_late_init) {
r = adev->mmhub_funcs->ras_late_init(adev);
@@ -811,12 +785,6 @@ static int gmc_v9_0_ecc_late_init(void *handle)
return r;
}
return 0;
-umc_late_fini:
- amdgpu_ras_late_fini(adev, adev->gmc.umc_ras_if, &umc_ih_info);
-free:
- kfree(adev->gmc.umc_ras_if);
- adev->gmc.umc_ras_if = NULL;
- return r;
}
static int gmc_v9_0_late_init(void *handle)