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authorOak Zeng <Oak.Zeng@amd.com>2019-10-07 15:32:23 -0500
committerAlex Deucher <alexander.deucher@amd.com>2019-10-10 19:24:19 -0500
commitf81b86a043270eb5f7e3a80354bea88d0b43ff6f (patch)
tree0b71d205e71ad13ae344dd1e9c85817cfc88a5aa /drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
parentcb1545f7101adfd3c0e1a0efb1310b62a8f22451 (diff)
drm/amdgpu: Enable gfx cache probing on HDP write for arcturus
This allows gfx cache to be probed and invalidated (for none-dirty cache lines) on a HDP write (from either another GPU or CPU). This should work only for the memory mapped as RW memory type newly added for arcturus, to achieve some cache coherence b/t multiple memory clients. Signed-off-by: Oak Zeng <Oak.Zeng@amd.com> Acked-by: Christian Konig <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 12bbccdd9d1c..9f2a893871ec 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1194,6 +1194,9 @@ static int gmc_v9_0_hw_init(void *handle)
/* TODO for renoir */
mmhub_v1_0_update_power_gating(adev, true);
break;
+ case CHIP_ARCTURUS:
+ WREG32_FIELD15(HDP, 0, HDP_MMHUB_CNTL, HDP_MMHUB_GCC, 1);
+ break;
default:
break;
}