diff options
| author | Jack Xiao <Jack.Xiao@amd.com> | 2020-06-04 18:27:28 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-05-04 10:43:51 -0400 |
| commit | 7149599be4085117ff21b2988890491fff25fecf (patch) | |
| tree | c17f923cc6224e9f25567fcab54b684687299048 /drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | |
| parent | 4df80927377b82e139a5d79151a824a3fb6ce787 (diff) | |
drm/amdgpu/mes10.1: add delay after mes engine enable
Add delay after mes engine enable, for it needs more time
to complete engine initialising.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/mes_v10_1.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c b/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c index 94812164998a..d4e64c5a3215 100644 --- a/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c +++ b/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c @@ -473,6 +473,7 @@ static void mes_v10_1_enable(struct amdgpu_device *adev, bool enable) data = REG_SET_FIELD(data, CP_MES_CNTL, MES_PIPE1_ACTIVE, adev->enable_mes_kiq ? 1 : 0); WREG32_SOC15(GC, 0, mmCP_MES_CNTL, data); + udelay(50); } else { data = RREG32_SOC15(GC, 0, mmCP_MES_CNTL); data = REG_SET_FIELD(data, CP_MES_CNTL, MES_PIPE0_ACTIVE, 0); |