diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2024-04-14 14:05:42 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2024-05-08 15:17:06 -0400 |
commit | 30f45a8ea46beba74710a75b3e1c4c54c22932b9 (patch) | |
tree | 3409b92dbaea8a8257913f0c9b6a7723b24a2d0a /drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c | |
parent | 3345f7ec0d852880b176b07abe8e8c4201a346ca (diff) |
drm/amdgpu: add set_reg_remap callback for NBIF 6.3.1
This will be used to consolidate the register remap offset
configuration and fix HDP flushes on systems non-4K pages.
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c b/drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c index 96ed00ac81ac..fe64c04ee20b 100644 --- a/drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c +++ b/drivers/gpu/drm/amd/amdgpu/nbif_v6_3_1.c @@ -424,6 +424,20 @@ static void nbif_v6_3_1_program_aspm(struct amdgpu_device *adev) #endif } +#define MMIO_REG_HOLE_OFFSET (0x80000 - PAGE_SIZE) + +static void nbif_v6_3_1_set_reg_remap(struct amdgpu_device *adev) +{ + if (!amdgpu_sriov_vf(adev) && (PAGE_SIZE <= 4096)) { + adev->rmmio_remap.reg_offset = MMIO_REG_HOLE_OFFSET; + adev->rmmio_remap.bus_addr = adev->rmmio_base + MMIO_REG_HOLE_OFFSET; + } else { + adev->rmmio_remap.reg_offset = SOC15_REG_OFFSET(NBIO, 0, + regBIF_BX_PF0_HDP_MEM_COHERENCY_FLUSH_CNTL) << 2; + adev->rmmio_remap.bus_addr = 0; + } +} + const struct amdgpu_nbio_funcs nbif_v6_3_1_funcs = { .get_hdp_flush_req_offset = nbif_v6_3_1_get_hdp_flush_req_offset, .get_hdp_flush_done_offset = nbif_v6_3_1_get_hdp_flush_done_offset, @@ -446,6 +460,7 @@ const struct amdgpu_nbio_funcs nbif_v6_3_1_funcs = { .remap_hdp_registers = nbif_v6_3_1_remap_hdp_registers, .get_rom_offset = nbif_v6_3_1_get_rom_offset, .program_aspm = nbif_v6_3_1_program_aspm, + .set_reg_remap = nbif_v6_3_1_set_reg_remap, }; @@ -492,4 +507,5 @@ const struct amdgpu_nbio_funcs nbif_v6_3_1_sriov_funcs = { .init_registers = nbif_v6_3_1_init_registers, .remap_hdp_registers = nbif_v6_3_1_remap_hdp_registers, .get_rom_offset = nbif_v6_3_1_get_rom_offset, + .set_reg_remap = nbif_v6_3_1_set_reg_remap, }; |