diff options
| author | Xiangliang Yu <Xiangliang.Yu@amd.com> | 2017-03-28 19:48:10 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-03-29 23:55:54 -0400 |
| commit | 6668b734468de12c077ebdf3ed0f9f60d10f9e6a (patch) | |
| tree | cc674ab4ce6d177cd439ed749cba2f83d4e8e61e /drivers/gpu/drm/amd/amdgpu/psp_v3_1.c | |
| parent | ec63982e90a8793a838dfba9037bde597bb565e1 (diff) | |
drm/amdgpu/psp: add check sOS sign
Confirm if sys driver and sOS are already been loaded through sOS
sign register, skip loading sys driver and sOS if finding the sign.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/psp_v3_1.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/psp_v3_1.c | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v3_1.c b/drivers/gpu/drm/amd/amdgpu/psp_v3_1.c index 49c3844bb695..5191c45ffdf3 100644 --- a/drivers/gpu/drm/amd/amdgpu/psp_v3_1.c +++ b/drivers/gpu/drm/amd/amdgpu/psp_v3_1.c @@ -170,7 +170,14 @@ int psp_v3_1_bootloader_load_sysdrv(struct psp_context *psp) void *psp_sysdrv_virt = NULL; uint64_t psp_sysdrv_mem; struct amdgpu_device *adev = psp->adev; - uint32_t size; + uint32_t size, sol_reg; + + /* Check sOS sign of life register to confirm sys driver and sOS + * are already been loaded. + */ + sol_reg = RREG32(SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_81)); + if (sol_reg) + return 0; /* Wait for bootloader to signify that is ready having bit 31 of C2PMSG_35 set to 1 */ ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_35), @@ -222,7 +229,14 @@ int psp_v3_1_bootloader_load_sos(struct psp_context *psp) void *psp_sos_virt = NULL; uint64_t psp_sos_mem; struct amdgpu_device *adev = psp->adev; - uint32_t size; + uint32_t size, sol_reg; + + /* Check sOS sign of life register to confirm sys driver and sOS + * are already been loaded. + */ + sol_reg = RREG32(SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_81)); + if (sol_reg) + return 0; /* Wait for bootloader to signify that is ready having bit 31 of C2PMSG_35 set to 1 */ ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_35), |