diff options
| author | Xiangliang Yu <Xiangliang.Yu@amd.com> | 2017-03-08 15:00:48 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-03-29 23:54:57 -0400 |
| commit | 1b922423ced7fbe7f1a8366eb399b7daf4ebaea7 (patch) | |
| tree | 02e0910d9d852a758503cf6169a6bb204c05ad10 /drivers/gpu/drm/amd/amdgpu | |
| parent | 3fc08b61df3837701fd6665c1b2b3df7ca44225b (diff) | |
drm/amdgpu: impl sriov detection for vega10
Read vega10 hw register to detect if sriov is enabled, and call
it before IP blocks setting.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c | 18 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/nbio_v6_1.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/soc15.c | 2 |
3 files changed, 21 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c index f517e9a8ce61..902187206c86 100644 --- a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c @@ -231,3 +231,21 @@ int nbio_v6_1_init(struct amdgpu_device *adev) return 0; } + +void nbio_v6_1_detect_hw_virt(struct amdgpu_device *adev) +{ + uint32_t reg; + + reg = RREG32(SOC15_REG_OFFSET(NBIO, 0, + mmRCC_PF_0_0_RCC_IOV_FUNC_IDENTIFIER)); + if (reg & 1) + adev->virt.caps |= AMDGPU_SRIOV_CAPS_IS_VF; + + if (reg & 0x80000000) + adev->virt.caps |= AMDGPU_SRIOV_CAPS_ENABLE_IOV; + + if (!reg) { + if (is_virtual_machine()) /* passthrough mode exclus sriov mod */ + adev->virt.caps |= AMDGPU_PASSTHROUGH_MODE; + } +} diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.h b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.h index a778d1c1fb9f..3e04093539f5 100644 --- a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.h +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.h @@ -48,5 +48,6 @@ void nbio_v6_1_ih_control(struct amdgpu_device *adev); u32 nbio_v6_1_get_rev_id(struct amdgpu_device *adev); void nbio_v6_1_update_medium_grain_clock_gating(struct amdgpu_device *adev, bool enable); void nbio_v6_1_update_medium_grain_light_sleep(struct amdgpu_device *adev, bool enable); +void nbio_v6_1_detect_hw_virt(struct amdgpu_device *adev); #endif diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c index 11e09d8458d9..ccbecc8d0b47 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15.c +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c @@ -469,6 +469,8 @@ static const struct amdgpu_ip_block_version vega10_common_ip_block = int soc15_set_ip_blocks(struct amdgpu_device *adev) { + nbio_v6_1_detect_hw_virt(adev); + switch (adev->asic_type) { case CHIP_VEGA10: amdgpu_ip_block_add(adev, &vega10_common_ip_block); |