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authorNikola Cornij <nikola.cornij@amd.com>2019-04-17 19:07:08 -0400
committerAlex Deucher <alexander.deucher@amd.com>2019-06-22 09:34:11 -0500
commitf446489adcbc9c4833ae724a985166731c577bcd (patch)
tree16ad0130141a8ba2f50643b0fbc4344707b9ffc0 /drivers/gpu/drm/amd/display/dc/dc_dsc.h
parentce76898527cd14e9f1b04f463fd3d1cae80ed9c6 (diff)
drm/amd/display: Add support for extended DSC DPCD caps
[why] A few of the new DSC DPCD caps were introduced by a DP 1.4a SCR in order to give DSC branch decoders a chance to expose their maximum throughput and maximum line width limitations. Signed-off-by: Nikola Cornij <nikola.cornij@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc_dsc.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dc_dsc.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dsc.h b/drivers/gpu/drm/amd/display/dc/dc_dsc.h
index be0f7b09086a..6de3bc9162ea 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dsc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_dsc.h
@@ -34,7 +34,8 @@ struct dc_dsc_bw_range {
};
-bool dc_dsc_parse_dsc_dpcd(const uint8_t *dpcd_dsc_data,
+bool dc_dsc_parse_dsc_dpcd(const uint8_t *dpcd_dsc_basic_data,
+ const uint8_t *dpcd_dsc_ext_data,
struct dsc_dec_dpcd_caps *dsc_sink_caps);
bool dc_dsc_compute_bandwidth_range(