diff options
author | Amy Zhang <Amy.Zhang@amd.com> | 2017-05-31 16:53:01 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2017-09-26 18:07:50 -0400 |
commit | 9f72f51d701cd2dd87a157d972650924fe91ec80 (patch) | |
tree | 2706bf28e4fb81a5dd40e55ae0b999e6715316ac /drivers/gpu/drm/amd/display/dc/dc_types.h | |
parent | 1a2c82a2f161f68deb5f0519c315bfc92ede8e01 (diff) |
drm/amd/display: Refactor to call set PSR wait loop in dce_dmcu instead of dce_clocks
Signed-off-by: Amy Zhang <Amy.Zhang@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc_types.h')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/dc_types.h | 101 |
1 files changed, 101 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h index d2f3b9fd7a30..06354c36c499 100644 --- a/drivers/gpu/drm/amd/display/dc/dc_types.h +++ b/drivers/gpu/drm/amd/display/dc/dc_types.h @@ -31,6 +31,7 @@ #include "dc_dp_types.h" #include "dc_hw_types.h" #include "dal_types.h" +#include "grph_object_defs.h" /* forward declarations */ struct dc_surface; @@ -493,6 +494,106 @@ struct psr_config { unsigned int psr_sdp_transmit_line_num_deadline; }; +union dmcu_psr_level { + struct { + unsigned int SKIP_CRC:1; + unsigned int SKIP_DP_VID_STREAM_DISABLE:1; + unsigned int SKIP_PHY_POWER_DOWN:1; + unsigned int SKIP_AUX_ACK_CHECK:1; + unsigned int SKIP_CRTC_DISABLE:1; + unsigned int SKIP_AUX_RFB_CAPTURE_CHECK:1; + unsigned int SKIP_SMU_NOTIFICATION:1; + unsigned int SKIP_AUTO_STATE_ADVANCE:1; + unsigned int DISABLE_PSR_ENTRY_ABORT:1; + unsigned int RESERVED:23; + } bits; + unsigned int u32all; +}; + +enum physical_phy_id { + PHYLD_0, + PHYLD_1, + PHYLD_2, + PHYLD_3, + PHYLD_4, + PHYLD_5, + PHYLD_6, + PHYLD_7, + PHYLD_8, + PHYLD_9, + PHYLD_COUNT, + PHYLD_UNKNOWN = (-1L) +}; + +enum phy_type { + PHY_TYPE_UNKNOWN = 1, + PHY_TYPE_PCIE_PHY = 2, + PHY_TYPE_UNIPHY = 3, +}; + +struct psr_context { + /* ddc line */ + enum channel_id channel; + /* Transmitter id */ + enum transmitter transmitterId; + /* Engine Id is used for Dig Be source select */ + enum engine_id engineId; + /* Controller Id used for Dig Fe source select */ + enum controller_id controllerId; + /* Pcie or Uniphy */ + enum phy_type phyType; + /* Physical PHY Id used by SMU interpretation */ + enum physical_phy_id smuPhyId; + /* Vertical total pixels from crtc timing. + * This is used for static screen detection. + * ie. If we want to detect half a frame, + * we use this to determine the hyst lines. + */ + unsigned int crtcTimingVerticalTotal; + /* PSR supported from panel capabilities and + * current display configuration + */ + bool psrSupportedDisplayConfig; + /* Whether fast link training is supported by the panel */ + bool psrExitLinkTrainingRequired; + /* If RFB setup time is greater than the total VBLANK time, + * it is not possible for the sink to capture the video frame + * in the same frame the SDP is sent. In this case, + * the frame capture indication bit should be set and an extra + * static frame should be transmitted to the sink. + */ + bool psrFrameCaptureIndicationReq; + /* Set the last possible line SDP may be transmitted without violating + * the RFB setup time or entering the active video frame. + */ + unsigned int sdpTransmitLineNumDeadline; + /* The VSync rate in Hz used to calculate the + * step size for smooth brightness feature + */ + unsigned int vsyncRateHz; + unsigned int skipPsrWaitForPllLock; + unsigned int numberOfControllers; + /* Unused, for future use. To indicate that first changed frame from + * state3 shouldn't result in psr_inactive, but rather to perform + * an automatic single frame rfb_update. + */ + bool rfb_update_auto_en; + /* Number of frame before entering static screen */ + unsigned int timehyst_frames; + /* Partial frames before entering static screen */ + unsigned int hyst_lines; + /* # of repeated AUX transaction attempts to make before + * indicating failure to the driver + */ + unsigned int aux_repeats; + /* Controls hw blocks to power down during PSR active state */ + union dmcu_psr_level psr_level; + /* Controls additional delay after remote frame capture before + * continuing powerd own + */ + unsigned int frame_delay; +}; + struct colorspace_transform { struct fixed31_32 matrix[12]; bool enable_remap; |