summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/display/dc/dc_types.h
diff options
context:
space:
mode:
authorCharlene Liu <charlene.liu@amd.com>2017-07-24 21:41:28 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-09-26 18:15:39 -0400
commitee356d8f4fff35510b83aa71299ddc0ccb798d58 (patch)
treeccc7f5f9ef9bdc88d854a50e94c07f0b873346d7 /drivers/gpu/drm/amd/display/dc/dc_types.h
parent7a6c4af6bf41516cc9e12d83cc8fcebfdd8be01c (diff)
drm/amd/display: single PSR display not allow CSTATE sw w/a
Description: HW issue when all the pipes are off, DCE_allow_cstate is 0. New sequence : blank OTG only instead of previous OTG_master_en=0) Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dc_types.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dc_types.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h
index c7539fe36b66..99b893fbcb42 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_types.h
@@ -539,7 +539,8 @@ union dmcu_psr_level {
unsigned int SKIP_SMU_NOTIFICATION:1;
unsigned int SKIP_AUTO_STATE_ADVANCE:1;
unsigned int DISABLE_PSR_ENTRY_ABORT:1;
- unsigned int RESERVED:23;
+ unsigned int SKIP_SINGLE_OTG_DISABLE:1;
+ unsigned int RESERVED:22;
} bits;
unsigned int u32all;
};