diff options
| author | Harry Wentland <harry.wentland@amd.com> | 2017-11-01 14:31:58 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-12-06 12:47:37 -0500 |
| commit | bd1be8e894e4963595a35ebeff512dc63d3ee328 (patch) | |
| tree | afa6c03618826fa9a7be0693e595f552cff01656 /drivers/gpu/drm/amd/display/dc/dce | |
| parent | a696dc208fa123d7c710ae757d3f621e9ab8b081 (diff) | |
drm/amd/display: A few more color indentation changes
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dce')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c | 33 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce/dce_transform.c | 5 |
2 files changed, 17 insertions, 21 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c b/drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c index d618fdd0cc82..d737e911971b 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c @@ -135,36 +135,34 @@ static void dce_ipp_cursor_set_attributes( } -static void dce_ipp_program_prescale( - struct input_pixel_processor *ipp, - struct ipp_prescale_params *params) +static void dce_ipp_program_prescale(struct input_pixel_processor *ipp, + struct ipp_prescale_params *params) { struct dce_ipp *ipp_dce = TO_DCE_IPP(ipp); /* set to bypass mode first before change */ REG_UPDATE(PRESCALE_GRPH_CONTROL, - GRPH_PRESCALE_BYPASS, - 1); + GRPH_PRESCALE_BYPASS, 1); REG_SET_2(PRESCALE_VALUES_GRPH_R, 0, - GRPH_PRESCALE_SCALE_R, params->scale, - GRPH_PRESCALE_BIAS_R, params->bias); + GRPH_PRESCALE_SCALE_R, params->scale, + GRPH_PRESCALE_BIAS_R, params->bias); REG_SET_2(PRESCALE_VALUES_GRPH_G, 0, - GRPH_PRESCALE_SCALE_G, params->scale, - GRPH_PRESCALE_BIAS_G, params->bias); + GRPH_PRESCALE_SCALE_G, params->scale, + GRPH_PRESCALE_BIAS_G, params->bias); REG_SET_2(PRESCALE_VALUES_GRPH_B, 0, - GRPH_PRESCALE_SCALE_B, params->scale, - GRPH_PRESCALE_BIAS_B, params->bias); + GRPH_PRESCALE_SCALE_B, params->scale, + GRPH_PRESCALE_BIAS_B, params->bias); if (params->mode != IPP_PRESCALE_MODE_BYPASS) { REG_UPDATE(PRESCALE_GRPH_CONTROL, - GRPH_PRESCALE_BYPASS, 0); + GRPH_PRESCALE_BYPASS, 0); /* If prescale is in use, then legacy lut should be bypassed */ REG_UPDATE(INPUT_GAMMA_CONTROL, - GRPH_INPUT_GAMMA_MODE, 1); + GRPH_INPUT_GAMMA_MODE, 1); } } @@ -223,13 +221,12 @@ static void dce_ipp_set_degamma( struct dce_ipp *ipp_dce = TO_DCE_IPP(ipp); uint32_t degamma_type = (mode == IPP_DEGAMMA_MODE_HW_sRGB) ? 1 : 0; - ASSERT(mode == IPP_DEGAMMA_MODE_BYPASS || - mode == IPP_DEGAMMA_MODE_HW_sRGB); + ASSERT(mode == IPP_DEGAMMA_MODE_BYPASS || mode == IPP_DEGAMMA_MODE_HW_sRGB); REG_SET_3(DEGAMMA_CONTROL, 0, - GRPH_DEGAMMA_MODE, degamma_type, - CURSOR_DEGAMMA_MODE, degamma_type, - CURSOR2_DEGAMMA_MODE, degamma_type); + GRPH_DEGAMMA_MODE, degamma_type, + CURSOR_DEGAMMA_MODE, degamma_type, + CURSOR2_DEGAMMA_MODE, degamma_type); } static const struct ipp_funcs dce_ipp_funcs = { diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_transform.c b/drivers/gpu/drm/amd/display/dc/dce/dce_transform.c index 330dbe9989d4..0f662e6ee9bd 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_transform.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_transform.c @@ -1177,9 +1177,8 @@ void dce110_opp_set_csc_default( default_adjust->out_color_space); } -static void program_pwl( - struct dce_transform *xfm_dce, - const struct pwl_params *params) +static void program_pwl(struct dce_transform *xfm_dce, + const struct pwl_params *params) { int retval; uint8_t max_tries = 10; |