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authorVitaly Prosyak <vitaly.prosyak@amd.com>2017-06-07 12:23:59 -0500
committerAlex Deucher <alexander.deucher@amd.com>2017-09-26 18:07:56 -0400
commit9edba5574d8253b739f4c78d880c80f94578859b (patch)
tree285b1f4fe7d9c42530e1002b1656ec9e6804ba5a /drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.h
parentc9742685c24acd6d71cdda3067bfc2f512fe2b7c (diff)
drm/amd/display: RV stereo support
HDMI frame pack and DP frame alternate in band Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.h
index 85a763af1956..c880fa587790 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.h
@@ -51,6 +51,7 @@
SRI(OTG_CONTROL, OTG, inst),\
SRI(OTG_STEREO_CONTROL, OTG, inst),\
SRI(OTG_3D_STRUCTURE_CONTROL, OTG, inst),\
+ SRI(OTG_STEREO_STATUS, OTG, inst),\
SRI(OTG_V_TOTAL_MAX, OTG, inst),\
SRI(OTG_V_TOTAL_MIN, OTG, inst),\
SRI(OTG_V_TOTAL_CONTROL, OTG, inst),\
@@ -96,6 +97,7 @@ struct dcn_tg_registers {
uint32_t OTG_CONTROL;
uint32_t OTG_STEREO_CONTROL;
uint32_t OTG_3D_STRUCTURE_CONTROL;
+ uint32_t OTG_STEREO_STATUS;
uint32_t OTG_V_TOTAL_MAX;
uint32_t OTG_V_TOTAL_MIN;
uint32_t OTG_V_TOTAL_CONTROL;
@@ -157,6 +159,8 @@ struct dcn_tg_registers {
SF(OTG0_OTG_STEREO_CONTROL, OTG_STEREO_SYNC_OUTPUT_POLARITY, mask_sh),\
SF(OTG0_OTG_STEREO_CONTROL, OTG_STEREO_EYE_FLAG_POLARITY, mask_sh),\
SF(OTG0_OTG_STEREO_CONTROL, OTG_DISABLE_STEREOSYNC_OUTPUT_FOR_DP, mask_sh),\
+ SF(OTG0_OTG_STEREO_CONTROL, OTG_DISABLE_STEREOSYNC_OUTPUT_FOR_DP, mask_sh),\
+ SF(OTG0_OTG_STEREO_STATUS, OTG_STEREO_CURRENT_EYE, mask_sh),\
SF(OTG0_OTG_3D_STRUCTURE_CONTROL, OTG_3D_STRUCTURE_EN, mask_sh),\
SF(OTG0_OTG_3D_STRUCTURE_CONTROL, OTG_3D_STRUCTURE_V_UPDATE_MODE, mask_sh),\
SF(OTG0_OTG_3D_STRUCTURE_CONTROL, OTG_3D_STRUCTURE_STEREO_SEL_OVR, mask_sh),\
@@ -243,6 +247,7 @@ struct dcn_tg_registers {
type OTG_STEREO_SYNC_OUTPUT_LINE_NUM;\
type OTG_STEREO_SYNC_OUTPUT_POLARITY;\
type OTG_STEREO_EYE_FLAG_POLARITY;\
+ type OTG_STEREO_CURRENT_EYE;\
type OTG_DISABLE_STEREOSYNC_OUTPUT_FOR_DP;\
type OTG_3D_STRUCTURE_EN;\
type OTG_3D_STRUCTURE_V_UPDATE_MODE;\