diff options
| author | Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> | 2019-06-05 16:35:08 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-07-18 14:18:09 -0500 |
| commit | 606b355170b56549890e8202a2b62f97d28b395e (patch) | |
| tree | 6b0fee2442f37d98c1fc359d83d844e655de918b /drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | |
| parent | c1f2e0154065963f95ce22e03ff05a420cb3aac7 (diff) | |
drm/amd/display: add hdmi2.1 dsc pps packet programming
This change adds EMP packet programming for enabling dsc with
hdmi. The packets are structured according to VESA HDMI 2.1x
r2 spec, section 10.10.2.2.
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c index 5fc4e0954eee..ddf15a3715e0 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c @@ -1783,8 +1783,9 @@ static void dcn20_reset_back_end_for_pipe( } } #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT - else if (pipe_ctx->stream_res.dsc) + else if (pipe_ctx->stream_res.dsc) { dp_set_dsc_enable(pipe_ctx, false); + } #endif /* by upper caller loop, parent pipe: pipe0, will be reset last. |