diff options
| author | Ilya Bakoulin <Ilya.Bakoulin@amd.com> | 2019-04-09 11:50:38 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-06-22 09:34:10 -0500 |
| commit | fbc9ca671f4ffbc0c873de17cf2305ca438cb09e (patch) | |
| tree | 5ecb5a259a0835afca9af67e9dfa8a8fbdad71f9 /drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.h | |
| parent | 2a874fa0257ac834142e0570a2bec629421ee031 (diff) | |
drm/amd/display: Fix ODM combine data format
[Why]
OPTC data format was left at its default value (444) when enabling
ODM combine. This caused issues with FPGA capture.
[How]
Write the OPTC_DATA_FORMAT field when enabling ODM combine.
Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.h index a21781332a06..ebf07c582da2 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.h +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.h @@ -66,6 +66,7 @@ SF(ODM0_OPTC_DATA_SOURCE_SELECT, OPTC_SEG1_SRC_SEL, mask_sh),\ SF(ODM0_OPTC_DATA_SOURCE_SELECT, OPTC_NUM_OF_INPUT_SEGMENT, mask_sh),\ SF(ODM0_OPTC_MEMORY_CONFIG, OPTC_MEM_SEL, mask_sh),\ + SF(ODM0_OPTC_DATA_FORMAT_CONTROL, OPTC_DATA_FORMAT, mask_sh),\ SF(ODM0_OPTC_DATA_FORMAT_CONTROL, OPTC_DSC_MODE, mask_sh),\ SF(ODM0_OPTC_BYTES_PER_PIXEL, OPTC_DSC_BYTES_PER_PIXEL, mask_sh),\ SF(ODM0_OPTC_WIDTH_CONTROL, OPTC_DSC_SLICE_WIDTH, mask_sh),\ @@ -95,7 +96,8 @@ void optc2_set_dsc_config(struct timing_generator *optc, void optc2_set_odm_bypass(struct timing_generator *optc, const struct dc_crtc_timing *dc_crtc_timing); -void optc2_set_odm_combine(struct timing_generator *optc, int combine_opp_id, int mpcc_hactive); +void optc2_set_odm_combine(struct timing_generator *optc, int combine_opp_id, + int mpcc_hactive, enum dc_pixel_encoding pixel_encoding); void optc2_get_optc_source(struct timing_generator *optc, uint32_t *num_of_src_opp, |