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authorDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>2019-03-26 13:26:37 -0400
committerAlex Deucher <alexander.deucher@amd.com>2019-06-22 09:34:08 -0500
commit0ba37b20ef1c587a24f0f8060f32a4d56f4d65df (patch)
treeff637d37bf364a066a3c63f63b4bf8004a6088cd /drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h
parent173932dec76fbf9f8e5a75a74ccbffc186ce0a4a (diff)
drm/amd/display: fix dsc validation
Currently dsc is validated not taking the image width limitation into mind. This change addresses that, but due to previous design being limited to non odm dsc validation additional sequence changes are made. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h
index c5f176fb654a..b5a75289f444 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h
@@ -118,7 +118,6 @@ void dcn20_set_mcif_arb_params(
bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context, bool fast_validate);
enum dc_status dcn20_build_mapped_resource(const struct dc *dc, struct dc_state *context, struct dc_stream_state *stream);
-enum dc_status dcn20_validate_global(struct dc *dc, struct dc_state *new_ctx);
enum dc_status dcn20_add_stream_to_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream);
enum dc_status dcn20_remove_stream_from_ctx(struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream);
enum dc_status dcn20_get_default_swizzle_mode(struct dc_plane_state *plane_state);