drm/amd/display: move vmid determination logic to a module

Currently vmid is decided internally inside dc. With the introduction
of new asics we are required to coordinate vmid use with external
components.

This change converts vmid logic to a DAL module allowing vmid to be
passed in as a parameter to DC.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

8 files changed, 91 insertions, 94 deletions

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c
index 724f1c5ef614..ece6e136437b 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.c
@@ -47,6 +47,11 @@
 #define FN(reg_name, field_name) \
 	hubbub1->shifts->field_name, hubbub1->masks->field_name
 
+#ifdef NUM_VMID
+#undef NUM_VMID
+#endif
+#define NUM_VMID 16
+
 bool hubbub2_dcc_support_swizzle(
 		enum swizzle_mode_values swizzle,
 		unsigned int bytes_per_element,
@@ -294,15 +299,6 @@ bool hubbub2_get_dcc_compression_cap(struct hubbub *hubbub,
 	return true;
 }
 
-void hubbub2_setup_vmid_ptb(struct hubbub *hubbub,
-		uint64_t ptb,
-		uint8_t vmid)
-{
-	struct dcn20_hubbub *hubbub1 = TO_DCN20_HUBBUB(hubbub);
-
-	dcn20_vmid_set_ptb(&hubbub1->vmid[vmid], ptb);
-}
-
 static enum dcn_hubbub_page_table_depth page_table_depth_to_hw(unsigned int page_table_depth)
 {
 	enum dcn_hubbub_page_table_depth depth = 0;
@@ -347,49 +343,53 @@ static enum dcn_hubbub_page_table_block_size page_table_block_size_to_hw(unsigne
 	return block_size;
 }
 
-void hubbub2_init_dchub(struct hubbub *hubbub,
-		struct hubbub_addr_config *config)
+void hubbub2_init_vm_ctx(struct hubbub *hubbub,
+		struct dcn_hubbub_virt_addr_config *va_config,
+		int vmid)
 {
-	int i;
 	struct dcn20_hubbub *hubbub1 = TO_DCN20_HUBBUB(hubbub);
-	struct dcn_vmid_page_table_config phys_config;
 	struct dcn_vmid_page_table_config virt_config;
 
+	virt_config.page_table_start_addr = va_config->page_table_start_addr >> 12;
+	virt_config.page_table_end_addr = va_config->page_table_end_addr >> 12;
+	virt_config.depth = page_table_depth_to_hw(va_config->page_table_depth);
+	virt_config.block_size = page_table_block_size_to_hw(va_config->page_table_block_size);
+	virt_config.page_table_base_addr = va_config->page_table_base_addr;
+
+	dcn20_vmid_setup(&hubbub1->vmid[vmid], &virt_config);
+}
+
+int hubbub2_init_dchub_sys_ctx(struct hubbub *hubbub,
+		struct dcn_hubbub_phys_addr_config *pa_config)
+{
+	struct dcn20_hubbub *hubbub1 = TO_DCN20_HUBBUB(hubbub);
+	struct dcn_vmid_page_table_config phys_config;
+
 	REG_SET(DCN_VM_FB_LOCATION_BASE, 0,
-			FB_BASE, config->pa_config.system_aperture.fb_base);
+			FB_BASE, pa_config->system_aperture.fb_base);
 	REG_SET(DCN_VM_FB_LOCATION_TOP, 0,
-			FB_TOP, config->pa_config.system_aperture.fb_top);
+			FB_TOP, pa_config->system_aperture.fb_top);
 	REG_SET(DCN_VM_FB_OFFSET, 0,
-			FB_OFFSET, config->pa_config.system_aperture.fb_offset);
+			FB_OFFSET, pa_config->system_aperture.fb_offset);
 	REG_SET(DCN_VM_AGP_BOT, 0,
-			AGP_BOT, config->pa_config.system_aperture.agp_bot);
+			AGP_BOT, pa_config->system_aperture.agp_bot);
 	REG_SET(DCN_VM_AGP_TOP, 0,
-			AGP_TOP, config->pa_config.system_aperture.agp_top);
+			AGP_TOP, pa_config->system_aperture.agp_top);
 	REG_SET(DCN_VM_AGP_BASE, 0,
-			AGP_BASE, config->pa_config.system_aperture.agp_base);
+			AGP_BASE, pa_config->system_aperture.agp_base);
 
-	if (config->pa_config.gart_config.page_table_start_addr != config->pa_config.gart_config.page_table_end_addr) {
+	if (pa_config->gart_config.page_table_start_addr != pa_config->gart_config.page_table_end_addr) {
 		phys_config.depth = 1;
 		phys_config.block_size = 4096;
-		phys_config.page_table_start_addr = config->pa_config.gart_config.page_table_start_addr >> 12;
-		phys_config.page_table_end_addr = config->pa_config.gart_config.page_table_end_addr >> 12;
+		phys_config.page_table_start_addr = pa_config->gart_config.page_table_start_addr >> 12;
+		phys_config.page_table_end_addr = pa_config->gart_config.page_table_end_addr >> 12;
+		phys_config.page_table_base_addr = pa_config->gart_config.page_table_base_addr;
 
 		// Init VMID 0 based on PA config
 		dcn20_vmid_setup(&hubbub1->vmid[0], &phys_config);
-		dcn20_vmid_set_ptb(&hubbub1->vmid[0], config->pa_config.gart_config.page_table_base_addr);
 	}
 
-	if (config->va_config.page_table_start_addr != config->va_config.page_table_end_addr) {
-		// Init VMID 1-15 based on VA config
-		for (i = 1; i < 16; i++) {
-			virt_config.page_table_start_addr = config->va_config.page_table_start_addr >> 12;
-			virt_config.page_table_end_addr = config->va_config.page_table_end_addr >> 12;
-			virt_config.depth = page_table_depth_to_hw(config->va_config.page_table_depth);
-			virt_config.block_size = page_table_block_size_to_hw(config->va_config.page_table_block_size);
-
-			dcn20_vmid_setup(&hubbub1->vmid[i], &virt_config);
-		}
-	}
+	return NUM_VMID;
 }
 
 void hubbub2_update_dchub(struct hubbub *hubbub,
@@ -564,8 +564,8 @@ static void hubbub2_program_watermarks(
 
 static const struct hubbub_funcs hubbub2_funcs = {
 	.update_dchub = hubbub2_update_dchub,
-	.init_dchub = hubbub2_init_dchub,
-	.setup_vmid_ptb = hubbub2_setup_vmid_ptb,
+	.init_dchub_sys_ctx = hubbub2_init_dchub_sys_ctx,
+	.init_vm_ctx = hubbub2_init_vm_ctx,
 	.dcc_support_swizzle = hubbub2_dcc_support_swizzle,
 	.dcc_support_pixel_format = hubbub2_dcc_support_pixel_format,
 	.get_dcc_compression_cap = hubbub2_get_dcc_compression_cap,
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h
index 6ca4a5a9f8c7..a7b6ca26a9ad 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubbub.h
@@ -89,9 +89,11 @@ bool hubbub2_initialize_vmids(struct hubbub *hubbub,
 		const struct dc_dcc_surface_param *input,
 		struct dc_surface_dcc_cap *output);
 
-void hubbub2_init_dchub(struct hubbub *hubbub,
-		struct hubbub_addr_config *config);
-
+int hubbub2_init_dchub_sys_ctx(struct hubbub *hubbub,
+		struct dcn_hubbub_phys_addr_config *pa_config);
+void hubbub2_init_vm_ctx(struct hubbub *hubbub,
+		struct dcn_hubbub_virt_addr_config *va_config,
+		int vmid);
 void hubbub2_update_dchub(struct hubbub *hubbub,
 		struct dchub_init_data *dh_data);
 
@@ -102,8 +104,4 @@ void hubbub2_get_dchub_ref_freq(struct hubbub *hubbub,
 void hubbub2_wm_read_state(struct hubbub *hubbub,
 		struct dcn_hubbub_wm *wm);
 
-void hubbub2_setup_vmid_ptb(struct hubbub *hubbub,
-		uint64_t ptb,
-		uint8_t vmid);
-
 #endif
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c
index dcba2c5326b2..d3f7dd374d50 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c
@@ -447,8 +447,7 @@ bool hubp2_dmdata_status_done(struct hubp *hubp)
 bool hubp2_program_surface_flip_and_addr(
 	struct hubp *hubp,
 	const struct dc_plane_address *address,
-	bool flip_immediate,
-	uint8_t vmid)
+	bool flip_immediate)
 {
 	struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);
 
@@ -458,7 +457,7 @@ bool hubp2_program_surface_flip_and_addr(
 
 	// Program VMID reg
 	REG_UPDATE(VMID_SETTINGS_0,
-			VMID, vmid);
+			VMID, address->vmid);
 
 	if (address->type == PLN_ADDR_TYPE_GRPH_STEREO) {
 		REG_UPDATE(DCSURF_FLIP_CONTROL, SURFACE_FLIP_MODE_FOR_STEREOSYNC, 0x1);
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h
index f790ab9db6eb..d5acc348be22 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h
@@ -260,8 +260,7 @@ void hubp2_program_deadline(
 bool hubp2_program_surface_flip_and_addr(
 	struct hubp *hubp,
 	const struct dc_plane_address *address,
-	bool flip_immediate,
-	uint8_t vmid);
+	bool flip_immediate);
 
 void hubp2_program_surface_config(
 	struct hubp *hubp,
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index d55b15fbfe99..20bc3b9fe879 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -1122,15 +1122,13 @@ void dcn20_enable_plane(
 		print_rq_dlg_ttu(dc, pipe_ctx);
 	}
 */
-	if (dc->vm_config.valid) {
+	if (dc->vm_pa_config.valid) {
 		struct vm_system_aperture_param apt;
 
 		apt.sys_default.quad_part = 0;
-		apt.sys_high.quad_part = 0;
-		apt.sys_low.quad_part = 0;
 
-		apt.sys_high.quad_part = dc->vm_config.pa_config.system_aperture.start_addr;
-		apt.sys_low.quad_part = dc->vm_config.pa_config.system_aperture.end_addr;
+		apt.sys_high.quad_part = dc->vm_pa_config.system_aperture.start_addr;
+		apt.sys_low.quad_part = dc->vm_pa_config.system_aperture.end_addr;
 
 		// Program system aperture settings
 		pipe_ctx->plane_res.hubp->funcs->hubp_set_vm_system_aperture_settings(pipe_ctx->plane_res.hubp, &apt);
@@ -1565,26 +1563,43 @@ void dcn20_disable_stream(struct pipe_ctx *pipe_ctx, int option)
 	dce110_disable_stream(pipe_ctx, option);
 }
 
-static void dcn20_init_dchub(struct dce_hwseq *hws, struct dc *dc, struct dc_addr_space_config *config)
+static void dcn20_init_vm_ctx(
+		struct dce_hwseq *hws,
+		struct dc *dc,
+		struct dc_virtual_addr_space_config *va_config,
+		int vmid)
 {
-	struct hubbub_addr_config hubbub_config;
-
-	hubbub_config.pa_config.system_aperture.fb_top = config->pa_config.system_aperture.fb_top;
-	hubbub_config.pa_config.system_aperture.fb_offset = config->pa_config.system_aperture.fb_offset;
-	hubbub_config.pa_config.system_aperture.fb_base = config->pa_config.system_aperture.fb_base;
-	hubbub_config.pa_config.system_aperture.agp_top = config->pa_config.system_aperture.agp_top;
-	hubbub_config.pa_config.system_aperture.agp_bot = config->pa_config.system_aperture.agp_bot;
-	hubbub_config.pa_config.system_aperture.agp_base = config->pa_config.system_aperture.agp_base;
-	hubbub_config.pa_config.gart_config.page_table_start_addr = config->pa_config.gart_config.page_table_start_addr;
-	hubbub_config.pa_config.gart_config.page_table_end_addr = config->pa_config.gart_config.page_table_end_addr;
-	hubbub_config.pa_config.gart_config.page_table_base_addr = config->pa_config.gart_config.page_table_base_addr;
-
-	hubbub_config.va_config.page_table_start_addr = config->va_config.page_table_start_addr;
-	hubbub_config.va_config.page_table_end_addr = config->va_config.page_table_end_addr;
-	hubbub_config.va_config.page_table_block_size = config->va_config.page_table_block_size_in_bytes;
-	hubbub_config.va_config.page_table_depth = config->va_config.page_table_depth;
-
-	dc->res_pool->hubbub->funcs->init_dchub(dc->res_pool->hubbub, &hubbub_config);
+	struct dcn_hubbub_virt_addr_config config;
+
+	if (vmid == 0) {
+		ASSERT(0); /* VMID cannot be 0 for vm context */
+		return;
+	}
+
+	config.page_table_start_addr = va_config->page_table_start_addr;
+	config.page_table_end_addr = va_config->page_table_end_addr;
+	config.page_table_block_size = va_config->page_table_block_size_in_bytes;
+	config.page_table_depth = va_config->page_table_depth;
+	config.page_table_base_addr = va_config->page_table_base_addr;
+
+	dc->res_pool->hubbub->funcs->init_vm_ctx(dc->res_pool->hubbub, &config, vmid);
+}
+
+static int dcn20_init_sys_ctx(struct dce_hwseq *hws, struct dc *dc, struct dc_phy_addr_space_config *pa_config)
+{
+	struct dcn_hubbub_phys_addr_config config;
+
+	config.system_aperture.fb_top = pa_config->system_aperture.fb_top;
+	config.system_aperture.fb_offset = pa_config->system_aperture.fb_offset;
+	config.system_aperture.fb_base = pa_config->system_aperture.fb_base;
+	config.system_aperture.agp_top = pa_config->system_aperture.agp_top;
+	config.system_aperture.agp_bot = pa_config->system_aperture.agp_bot;
+	config.system_aperture.agp_base = pa_config->system_aperture.agp_base;
+	config.gart_config.page_table_start_addr = pa_config->gart_config.page_table_start_addr;
+	config.gart_config.page_table_end_addr = pa_config->gart_config.page_table_end_addr;
+	config.gart_config.page_table_base_addr = pa_config->gart_config.page_table_base_addr;
+
+	return dc->res_pool->hubbub->funcs->init_dchub_sys_ctx(dc->res_pool->hubbub, &config);
 }
 
 static bool patch_address_for_sbs_tb_stereo(
@@ -1619,30 +1634,19 @@ static void dcn20_update_plane_addr(const struct dc *dc, struct pipe_ctx *pipe_c
 	bool addr_patched = false;
 	PHYSICAL_ADDRESS_LOC addr;
 	struct dc_plane_state *plane_state = pipe_ctx->plane_state;
-	uint8_t vmid;
 
 	if (plane_state == NULL)
 		return;
 
 	addr_patched = patch_address_for_sbs_tb_stereo(pipe_ctx, &addr);
 
-	// Call Helper to assign correct VMID to this PTB
-	vmid = get_vmid_for_ptb(dc->vm_helper,
-			plane_state->address.page_table_base.quad_part,
-			pipe_ctx->pipe_idx);
-
-	// Call hubbub to program PTB of VMID only if its VA
-	// PA PTB is a one-time setup at init
-	if (vmid > 0 && dc->res_pool->hubbub->funcs->setup_vmid_ptb)
-		dc->res_pool->hubbub->funcs->setup_vmid_ptb(dc->res_pool->hubbub,
-				plane_state->address.page_table_base.quad_part,
-				vmid);
+	// Call Helper to track VMID use
+	vm_helper_mark_vmid_used(dc->vm_helper, plane_state->address.vmid, pipe_ctx->plane_res.hubp->inst);
 
 	pipe_ctx->plane_res.hubp->funcs->hubp_program_surface_flip_and_addr(
 			pipe_ctx->plane_res.hubp,
 			&plane_state->address,
-			plane_state->flip_immediate,
-			vmid);
+			plane_state->flip_immediate);
 
 	plane_state->status.requested_address = plane_state->address;
 
@@ -1991,7 +1995,8 @@ void dcn20_hw_sequencer_construct(struct dc *dc)
 	dc->hwss.blank_pixel_data = dcn20_blank_pixel_data;
 	dc->hwss.dmdata_status_done = dcn20_dmdata_status_done;
 	dc->hwss.disable_stream = dcn20_disable_stream;
-	dc->hwss.init_dchub = dcn20_init_dchub;
+	dc->hwss.init_sys_ctx = dcn20_init_sys_ctx;
+	dc->hwss.init_vm_ctx = dcn20_init_vm_ctx;
 	dc->hwss.disable_stream_gating = dcn20_disable_stream_gating;
 	dc->hwss.enable_stream_gating = dcn20_enable_stream_gating;
 	dc->hwss.setup_vupdate_interrupt = dcn20_setup_vupdate_interrupt;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
index 26af860df7d4..4cc66c2ccb1d 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
@@ -2899,7 +2899,7 @@ static bool construct(
 
 	// Init the vm_helper
 	if (dc->vm_helper)
-		init_vm_helper(dc->vm_helper, 16, pool->base.pipe_count);
+		vm_helper_init(dc->vm_helper, 16);
 
 	/*************************************************
 	 *  Create resources                             *
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.c
index 50953c0bd4e3..27679ef6ebe8 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.c
@@ -51,12 +51,9 @@ void dcn20_vmid_setup(struct dcn20_vmid *vmid, const struct dcn_vmid_page_table_
 	REG_SET_2(CNTL, 0,
 			VM_CONTEXT0_PAGE_TABLE_DEPTH, config->depth,
 			VM_CONTEXT0_PAGE_TABLE_BLOCK_SIZE, config->block_size);
-}
 
-void dcn20_vmid_set_ptb(struct dcn20_vmid *vmid, uint64_t base)
-{
 	REG_SET(PAGE_TABLE_BASE_ADDR_HI32, 0,
-			VM_CONTEXT0_PAGE_DIRECTORY_ENTRY_HI32, (base >> 32) & 0xFFFFFFFF);
+			VM_CONTEXT0_PAGE_DIRECTORY_ENTRY_HI32, (config->page_table_base_addr >> 32) & 0xFFFFFFFF);
 	REG_SET(PAGE_TABLE_BASE_ADDR_LO32, 0,
-			VM_CONTEXT0_PAGE_DIRECTORY_ENTRY_LO32, base & 0xFFFFFFFF);
+			VM_CONTEXT0_PAGE_DIRECTORY_ENTRY_LO32, config->page_table_base_addr & 0xFFFFFFFF);
 }
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.h
index 9c2f7016af2a..02fafb013fc6 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_vmid.h
@@ -86,6 +86,5 @@ struct dcn20_vmid {
 };
 
 void dcn20_vmid_setup(struct dcn20_vmid *vmid, const struct dcn_vmid_page_table_config *config);
-void dcn20_vmid_set_ptb(struct dcn20_vmid *vmid, uint64_t base);
 
 #endif /* DAL_DC_DCN20_DCN20_VMID_H_ */