diff options
| author | David Galiffi <David.Galiffi@amd.com> | 2022-01-23 13:20:18 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-01-25 18:00:35 -0500 |
| commit | 0015cce5cf04d3bd7b2ae4f62d5cea5d35383e8c (patch) | |
| tree | 85ab6e3be83936f8ac6c26368757049941be0c83 /drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.h | |
| parent | f6a3795d35c69bd34a556e1d93000057aed78599 (diff) | |
drm/amd/display: Fix disabling dccg clocks
[How & Why]
Updated procedure to match hardware programming guide.
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Eric Yang <Eric.Yang2@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: David Galiffi <David.Galiffi@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.h b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.h index a013a32bbaf7..4039273872be 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.h +++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dccg.h @@ -66,6 +66,7 @@ SR(DSCCLK1_DTO_PARAM),\ SR(DSCCLK2_DTO_PARAM),\ SR(DSCCLK_DTO_CTRL),\ + SR(DCCG_GATE_DISABLE_CNTL2),\ SR(DCCG_GATE_DISABLE_CNTL3),\ SR(HDMISTREAMCLK0_DTO_PARAM) |