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authorMartin Tsai <martin.tsai@amd.com>2019-02-11 15:26:21 +0800
committerAlex Deucher <alexander.deucher@amd.com>2019-03-19 15:04:02 -0500
commit9cc032b239399a43290bb203b399d0ab3ec81e27 (patch)
tree29888f4c144926b1f1aa9ff091c1ed63329ca4c9 /drivers/gpu/drm/amd/display/dc/dm_helpers.h
parent55c374e9eb72be0de5d4fe2ef4d7803cd4ea6329 (diff)
drm/amd/display: Poll pending DOWN_REP before enabling the link
[Why] With special monitor combination on MST, the UP_REQ could come after clear payload table. It makes the pending DOWN_REP fail to be handled after link training and the new DOWN_REQ will be queued until time out . [How] To move the current polling pending DOWN_REP procedure to after clear payload table to make sure the pending DOWN_REP can be done before enabling the link. Signed-off-by: Martin Tsai <martin.tsai@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dm_helpers.h')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dm_helpers.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dm_helpers.h b/drivers/gpu/drm/amd/display/dc/dm_helpers.h
index e81b24374bcb..ccbfe9680d27 100644
--- a/drivers/gpu/drm/amd/display/dc/dm_helpers.h
+++ b/drivers/gpu/drm/amd/display/dc/dm_helpers.h
@@ -58,7 +58,7 @@ bool dm_helpers_dp_mst_write_payload_allocation_table(
bool enable);
/*
- * poll pending down reply before clear payload allocation table
+ * poll pending down reply
*/
void dm_helpers_dp_mst_poll_pending_down_reply(
struct dc_context *ctx,