diff options
| author | Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> | 2019-10-01 11:01:00 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-10-25 16:50:08 -0400 |
| commit | 5cb4ca07c2d53d492f014ee65995fcfc08f43db9 (patch) | |
| tree | 9c4dff2a2ad6f94308324adebacf6354aabc7c63 /drivers/gpu/drm/amd/display/dc/dm_pp_smu.h | |
| parent | 8c35730993ef5d3f634117e2c840575bc8e26bdc (diff) | |
drm/amd/display: fix number of dcn21 dpm clock levels
These are specific to dcn21 and should not be increased for
reuse on other asics.
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Chris Park <Chris.Park@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dm_pp_smu.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dm_pp_smu.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dm_pp_smu.h b/drivers/gpu/drm/amd/display/dc/dm_pp_smu.h index b01db61b6181..ef7df9ef6d7e 100644 --- a/drivers/gpu/drm/amd/display/dc/dm_pp_smu.h +++ b/drivers/gpu/drm/amd/display/dc/dm_pp_smu.h @@ -251,8 +251,8 @@ struct pp_smu_funcs_nv { #define PP_SMU_NUM_SOCCLK_DPM_LEVELS 8 #define PP_SMU_NUM_DCFCLK_DPM_LEVELS 8 -#define PP_SMU_NUM_FCLK_DPM_LEVELS 8 -#define PP_SMU_NUM_MEMCLK_DPM_LEVELS 8 +#define PP_SMU_NUM_FCLK_DPM_LEVELS 4 +#define PP_SMU_NUM_MEMCLK_DPM_LEVELS 4 struct dpm_clock { uint32_t Freq; // In MHz |