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authorThomas Bogendoerfer <tsbogend@alpha.franken.de>2020-03-30 13:31:37 +0200
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2020-03-30 13:31:37 +0200
commitba15533275dd70238b523417d222d43fb40dac9d (patch)
treee97f6b804994d20ce476dc5a123fc074799e9584 /drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h
parentf75410a406e934e4cf31e0a7ec151799a6bf38cf (diff)
parent7111951b8d4973bda27ff663f2cf18b663d15b48 (diff)
Merge tag 'v5.6' into mips-next
Linux 5.6
Diffstat (limited to 'drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h')
-rw-r--r--drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h
index b6f74bf4af02..27bb8c1ab858 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h
@@ -7376,6 +7376,8 @@
#define mmCRTC4_CRTC_DRR_CONTROL 0x0f3e
#define mmCRTC4_CRTC_DRR_CONTROL_BASE_IDX 2
+#define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0 0x395d
+#define mmDCHUBBUB_SDPIF_MMIO_CNTRL_0_BASE_IDX 2
// addressBlock: dce_dc_fmt4_dispdec
// base address: 0x2000