diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2015-11-13 23:51:40 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2015-12-21 16:42:38 -0500 |
| commit | 9c0bad907413f5e3bea19d062beaab65b3dbf98f (patch) | |
| tree | d1e4ed1fcf0997efd0590bfba57ab11765d7495d /drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c | |
| parent | d39d5c2c9dcfb9e9aec2be154784a12f5b4a6c97 (diff) | |
drm/amd/powerplay: implement smc state upload for CZ
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c')
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c | 22 |
1 files changed, 12 insertions, 10 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c b/drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c index dc1d3d20aa5c..fdda6b4acb39 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c @@ -1163,8 +1163,8 @@ static int init_clock_voltage_dependency(struct pp_hwmgr *hwmgr, hwmgr->dyn_state.vddc_dependency_on_mclk = NULL; hwmgr->dyn_state.vddc_dep_on_dal_pwrl = NULL; hwmgr->dyn_state.mvdd_dependency_on_mclk = NULL; - hwmgr->dyn_state.vce_clocl_voltage_dependency_table = NULL; - hwmgr->dyn_state.uvd_clocl_voltage_dependency_table = NULL; + hwmgr->dyn_state.vce_clock_voltage_dependency_table = NULL; + hwmgr->dyn_state.uvd_clock_voltage_dependency_table = NULL; hwmgr->dyn_state.samu_clock_voltage_dependency_table = NULL; hwmgr->dyn_state.acp_clock_voltage_dependency_table = NULL; hwmgr->dyn_state.ppm_parameter_table = NULL; @@ -1182,7 +1182,7 @@ static int init_clock_voltage_dependency(struct pp_hwmgr *hwmgr, (const ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table *) (((unsigned long) powerplay_table) + table_offset); result = get_vce_clock_voltage_limit_table(hwmgr, - &hwmgr->dyn_state.vce_clocl_voltage_dependency_table, + &hwmgr->dyn_state.vce_clock_voltage_dependency_table, table, array); } @@ -1197,7 +1197,7 @@ static int init_clock_voltage_dependency(struct pp_hwmgr *hwmgr, (const ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table *) (((unsigned long) powerplay_table) + table_offset); result = get_uvd_clock_voltage_limit_table(hwmgr, - &hwmgr->dyn_state.uvd_clocl_voltage_dependency_table, ptable, array); + &hwmgr->dyn_state.uvd_clock_voltage_dependency_table, ptable, array); } table_offset = get_samu_clock_voltage_limit_table_offset(hwmgr, @@ -1533,6 +1533,8 @@ static int pp_tables_initialize(struct pp_hwmgr *hwmgr) int result; const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table; + hwmgr->need_pp_table_upload = true; + powerplay_table = get_powerplay_table(hwmgr); result = init_powerplay_tables(hwmgr, powerplay_table); @@ -1607,14 +1609,14 @@ static int pp_tables_uninitialize(struct pp_hwmgr *hwmgr) hwmgr->dyn_state.vddc_phase_shed_limits_table = NULL; } - if (NULL != hwmgr->dyn_state.vce_clocl_voltage_dependency_table) { - kfree(hwmgr->dyn_state.vce_clocl_voltage_dependency_table); - hwmgr->dyn_state.vce_clocl_voltage_dependency_table = NULL; + if (NULL != hwmgr->dyn_state.vce_clock_voltage_dependency_table) { + kfree(hwmgr->dyn_state.vce_clock_voltage_dependency_table); + hwmgr->dyn_state.vce_clock_voltage_dependency_table = NULL; } - if (NULL != hwmgr->dyn_state.uvd_clocl_voltage_dependency_table) { - kfree(hwmgr->dyn_state.uvd_clocl_voltage_dependency_table); - hwmgr->dyn_state.uvd_clocl_voltage_dependency_table = NULL; + if (NULL != hwmgr->dyn_state.uvd_clock_voltage_dependency_table) { + kfree(hwmgr->dyn_state.uvd_clock_voltage_dependency_table); + hwmgr->dyn_state.uvd_clock_voltage_dependency_table = NULL; } if (NULL != hwmgr->dyn_state.samu_clock_voltage_dependency_table) { |